DP8459 datasheet(16/35 Pages) NSC

16 / 35 page

AC Electrical Characteristics (Continued)

Over recommended V

CC and operating temperature range.

Symbol

Parameter

Min

Typ

Max

Units

HOLD

SYNC CLOCK Rest Period (Logical One) at Assertion

or De-Assertion of READ GATE

⁄2

VCO

PDT

SCK Negative Edge to PREAMBLE DETECTED

Positive Edge at End of Detection Sequence

PDT1

Length of Valid 1T Preamble Pattern Required for

Occurrence of PREAMBLE DETECTED

ERD

Pulses

PDT2

Length of Valid 2T Preamble Pattern Required for

Occurrence of PREAMBLE DETECTED

ERD

Pulses

PDT3

Length of Valid 3T Preamble Pattern Required for

Occurrence of PREAMBLE DETECTED

ERD

Pulses

PDT4

Length of Valid 4T Preamble Pattern Required for

Occurrence of PREAMBLE DETECTED

ERD

Pulses

Window Strobe Time Step (M = Hex Value of Bits 0–3

in CONTROL REGISTER; Bit 4 = Sign Bit)

M x (1.8%)

RFC

RFC–SCK1

Positive Transition Propagation Delay from

REF CLOCK INPUT to SYNC CLOCK OUTPUT,

READ GATE Low

RFC–SCK0

Negative Transition Propagation Delay from

REF CLOCK INPUT to SYNC CLOCK OUTPUT,

READ GATE Low

Note 1: The DP8459V-10 static window speciﬁcation, tT, applies only to the factory-tested 2,7-code data rate of 10 Mb/s (with RS0,1,2 = 010) and with the

component values as listed in Figures 5 and 10, test conﬁguration as shown in Figure 23, test procedure as shown in Figure 24, and strobe word M = −2. Signiﬁcant

variation in tT as a percentage of the VCO period due to the use of other ﬁlters and data rates is not expected.

Note 2: The DP8459V-25 static window speciﬁcation, tT, incorporates the DP8459V-10 window speciﬁcation and, in addition, the factory-tested 2,7-code data rate

of 20 Mb/s (with RS0, 1, 2, = 000), with the component values as listed in Figures 5 and 10, test conﬁguration as shown in Figure 23, test procedure as shown in

Figure 24, and strobe word M = −3. Signiﬁcant variation in tT as a percentage of the VCO period due to the use of other ﬁlters and data rates is not expected.

Note 3: IIN = VCC/(4xRIN). RIN = RNOM (HGD High) or RNOM||RBOOST (HGD Low).

Note 4: tZPSR (ZPS Read) gauges the accuracy with which the ZPS circuitry aligns the VCO to the triggering ERD bit internally (i.e., initial phase step) at the

completion of a ZPS operation following READ GATE assertion.

DC Electrical Characteristics Over recommended operating temperature range.

Symbol

Parameter

Conditions

Min

Typ

Max

Units

Input Clamp Voltage

CC = Min, II = −18 mA

−1.5

High Level Output Voltage

CC = Min, IOH = Max

CC−2V

CC−1.6V

Low Level Output Voltage ( Note 4 )

CC = Min, IOL = Max

0.5

High Level Input Current

CC = Max, VI = 2.7V

µA

Low Level Input Current

CC = Max, VI = 0.4V

−200

µA

Output Drive Current ( Note 1 )

CC = Max, VO = 2.125V

−12

−110

CPO

Charge Pump Output Current (K1)

100

≤ I

Rp ≤ 1000 (Note 2 )

1.7 I

2.0 I

2.5 I

µA

CPO-OFF

Charge Pump Output Inactive Current

100

≤ I

Rp ≤ 1000 (Note 2 )

−0.85

+0.85

µA

VCOI

VCOI Offset Current

VCOI Voltage 1.5V

−0.25

+0.25

µA

RNOM

Voltage across R-NOM Resistor

1.2 k

Ω≤ R-NOM ≤ 12 kΩ

Typ.

−18%

0.26 V

Typ.

+18%

RBST

Voltage across R-BOOST Resistor

1.2 k

Ω≤ R-BOOST ≤ 12

Ω

Typ.

−18%

0.26 V

Typ.

+18%

CC1

Supply Current, Nominal Strobe

CC = Max (Note 3 )

190

Note 1: This value has been chosen to produce a current that closely approximates one-half of the true short-circuit output current, IOS.

Note 2: IRp = INOM +IBOOST.

Note 3: ICC1 is measured with the window strobe set at nominal timing (Strobe Bits 0 through 5 = 0,0,0,0,0,0); VCO operating at maximum allowed frequency within

any given range selection. ICC typically increases by 30 mA when the strobe is set at the maximum early position (M = −15). This is not a linear increase per step.

Most of the increase occurs as the −15 step is approached. ICC decreases as the window is moved late.

Note 4: PUMP UP and PUMP DOWN outputs have no current sinking capability and thus are excluded from this speciﬁcation.

PrintDate=1996/07/31 PrintTime=11:05:57 ds009322 Rev. No. 1

Proof

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