PC87591L datasheet(57/437 Pages) NSC

57 / 437 page

2.0 Signal/Pin Description and Configuration (Continued)

Revision 1.07

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176

IOPK0

I/O

Core BIU

DEV Env. or

MCFG.

ENEMEM=1

176

IOPK1

I/O

176

IOPK2

I/O

A10

176

IOPK3

I/O

A11

176

IOPK4

I/O

A12

176

IOPK5

I/O

A13_BE0

176

IOPK6

I/O

A14_BE1

176

IOPK7

I/O

A15_CBRD

176

IOPL0

I/O

A16

176

IOPL1

I/O

A17

176

IOPL2

I/O

A18

176

IOPL3

I/O

A19

176

IOPL4

I/O

WR1

DEV Env. or

(MCFG.

ENEMEM=1

and MCFG.

EXMEM16=1)

176

IOPM0

I/O

176

IOPM1

I/O

176

IOPM2

I/O

D10

176

IOPM3

I/O

D11

176

IOPM4

I/O

D12

176

IOPM5

I/O

D13

176

IOPM6

I/O

D14

176

IOPM7

I/O

D15

128/176

ADC Voltage

AD9

ADCCNF. REM-

DEN=0

ADC Temp

ADCCNF.

REMDEN=1

128/176

AD8

1. GA20 is implemented using the GPIO.

2. RESET2 use is orthogonal to the other alternate functions and is determined by the setting in the on-chip ﬂash

Protection Word (see Section 4.16.6 on page 226), although it is recommended to use it in conjunction with an

interrupt on the same pin. See “Using RESET2 Input” on page 67.

Table 8. Alternate Function Selection (Continued)

PKG

GPIO

Alternate Function 1

Alternate Function 2

128/176 Name

Type

Module

Signal Name

Select

Module

Signal Name

Select

PC87591L Datasheet(PDF) 57 Page - National Semiconductor (TI)

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