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PC87591L Datasheet(PDF) 74 Page - National Semiconductor (TI)

[Old version datasheet] Texas Instruments acquired National semiconductor.
Part # PC87591L
Description  LPC Mobile Embedded Controllers
PDF  437 Pages
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Manufacturer  NSC [National Semiconductor (TI)]
Direct Link  http://www.national.com
Logo NSC - National Semiconductor (TI)

PC87591L Datasheet(HTML) 74 Page - National Semiconductor (TI)

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4.0 Embedded Controller Modules (Continued)
www.national.com
74
Revision 1.07
4.1.5
Late Write Bus Cycle
If EWR in BCFG register is 0, the BIU uses the late write bus cycle. The basic late write bus cycle takes two clock cycles.
This write bus cycle requires the RD signal in the memory device interface.
A write bus cycle starts at T1. When the data bus is in TRI-STATE, the address is placed on the address bus and SELn (or
SELIO) is activated. Next, WR0-1 are activated. RD is inactive to indicate this is a write transaction.
CLK
A0-19
SELx
SELy
RD
WR0-1
D0-15
Normal Read
Early Write
Read,
T1
T2
T1
T2
T1
T2
All Other Zones
T3
In
In
BST0-2
(Note)
(x
≠ y)
(y
≠ x)
Out
Figure 13. Early Write Following Normal Read with 0 Wait
Bus State
CLK
A0-19
SELn
RD
WR0-1
D0-15
T1
TIW
T2
T3
THold
Out
BST0-2
Figure 14. Early Write Bus Cycle with 1 Internal Wait and 1 Hold
Bus State



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