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FT4222HQ-C-R Datasheet(PDF) 12 Page - Future Technology Devices International Ltd.

Part # FT4222HQ-C-R
Description  USB2.0 to QuadSPI/I2C Bridge IC
PDF  49 Pages
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Manufacturer  FTDI [Future Technology Devices International Ltd.]
Direct Link  http://www.ftdichip.com
Logo FTDI - Future Technology Devices International Ltd.

FT4222HQ-C-R Datasheet(HTML) 12 Page - Future Technology Devices International Ltd.

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Copyright © Future Technology Devices International Limited
12
FT4222H USB2.0 TO QUADSPI/I2C BRIDGE IC
1.3
Document No.: FT_001011 Clearance No.: FTDI#405
SCK Freq. (Hz)
SCK = Operating Clock * the following ratio
Operating
Clock
Max Throughput
can be expected
1/2
1/4
1/8
1/16
1/32
1/64
1/128
1/256
80MHz
53.8Mbps*
40M*
20M*
10M
5M
2.5M
1.25M
625K
312.5K
60MHz
39.7Mbps*
30M*
15M
7.5M
3.75M
1.875M
937.5K
468.75K
234.375K
48MHz
31.5Mbps*
24M*
12M
6M
3M
1.5M
750K
375K
187.5K
24MHz
15.8Mbps*
12M*
6M
3M
1.5M
750K
375K
187.5K
93.75K
Table 4.1 SCK Operating Frequency in SPI Master Mode
*The max. throughput can be expected under the condition of quad mode transfers on FT4222H-C
with a high operating frequency on SCK. It also depends on the USB bus transfer condition. For
example, the max throughput that can be expected is up to 53.8Mbps when the operating clock is
equal to 80MHz, SCK is set as 20MHz or 40MHz, the data bus is operating in quad mode and the
USB bus is operating at hi-speed USB rates with sufficient bandwidth. The performance for
FT4222H-B and FT4222H can be referred to TN_170_FT4222H_Rev.C_Technical_Note.PDF
QuadSPI as slave functions include:
Single Mode (1-bit) data transfer with full duplex serial data transfer
Can accept SCK operating frequency up to 20 MHz
Operating Clock Frequency
Max Acceptable Frequency on SCK
80MHz
<= 20MHz
60MHz
<= 15MHz
48MHz
<= 12MHz
24MHz
<= 6MHz
Table 4.2 Max. Acceptable Operating Frequency on SCK in SPI Slave Mode
I2C Master/Slave Controller. I2C (Inter Integrated Circuit) is a multi-master serial bus invented by
Philips. I2C uses two bi-directional open-drain wires called serial data (SDA) and serial clock (SCL).
Common I2C bus speeds are the standard mode (SM) with bit rate up to 100 kbit/s, fast mode (FM) with
the bit rate up to 400 kbit/s, Fast mode plus (FM+) with the bit rate up to 1 Mbit/s, and High Speed
mode (HS) with the bit rate up to 3.4 Mbit/s. Refer to the I2C specification for more information on the
protocol.
The FT4222H device can operates as master or slave, and the major functions include:
Master or slave mode configurable
Fully compatible to v2.1 and v3 specification
7-bit address support
Support 4 speed configurations defined in I2C-bus specification
Support bit rate up to 6.66Mbit/s both in master and slave mode
Clock stretching support in master and slave mode
GPIOs. FT4222H contains 4 GPIO pins for various functions. The drive strength, slew rate control and
pull high/low resistors can be configured in the vendor configurable area of the OTP via FT_PROG. When
the USB GPIO interface is enabled and supported, GPIOs can be directly controlled by APIs (Application
Programming Interface) which are defined in the support library, LibFT4222, to match the requirement.
GPIOs in the FT4222H functions include:
GPIO0 can be configured as GPIO0 or I2C SCL or SPIM slave selection SS1O



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