FT4222HQ-C-R datasheet(14/49 Pages) FTDI

14 / 49 page

FT4222H USB2.0 TO QUADSPI/I2C BRIDGE IC

1.3

Document No.: FT_001011 Clearance No.: FTDI#405

FT4222H Chip Mode Configuration and SPI/I2C Interface

5.1

Chip Mode Configuration

The FT4222H has 4 configuration modes selected by {DCNF1, DCNF0}. The chip configuration mode will

determine the number of USB interfaces for data streams and for GPIO control. The data stream interface

is for data transfer between the USB2.0 host and the SPI/ I2C device. The purpose of the GPIO interface

is for fully controlling the GPIOs. The following table shows the pin functions corresponding to the chip

configuration mode.

Table 5.1 FT4222H Pin Functions on Chip Configuration Mode

*One of the SPIM, SPIS, I2C function is selected, the other 2 functions will be disabled

Note that GPIOx pins cannot be controlled by the software driver when GPIOx pins play the role as SPIM

SSxO, I2C SCL/SDA, SUSP or WAKE.

Chip Configuration only determines the number of interface/functions supported but do not decide which

bus interface (SPI/ I2C /GPIO) or which role (master/slave) that the FT4222H will take. The user can use

the initialisation APIs provided by the support library, LibFT4222, to configure which interface and role

will be taken.

The support library for FT4222H, LibFT4222, which is based on D2XX, provides high-level and convenient

APIs (Application Programming Interface) to speed up user application development. For further details

refer to the User Guide For LibFT4222.

FT4222HQ-C-R Datasheet(PDF) 14 Page - Future Technology Devices International Ltd.