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AS4C64M8D2 Datasheet(PDF) 31 Page - Alliance Semiconductor Corporation

Part # AS4C64M8D2
Description  Fully synchronous operation
PDF  59 Pages
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Manufacturer  ALSC [Alliance Semiconductor Corporation]
Direct Link  https://www.alliancememory.com
Logo ALSC - Alliance Semiconductor Corporation

AS4C64M8D2 Datasheet(HTML) 31 Page - Alliance Semiconductor Corporation

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AS4C64M8D2
Confidential
31
Rev. 1.0
Feb. /2014
Table 28. Input clock jitter spec parameter
Parameter
Symbol
-25
-3
Units Notes
Min.
Max.
Min.
Max.
Clock period jitter
tJIT (per)
-100
100
-125
125
ps
33
Clock period jitter during DLL locking
period
tJIT (per,lck)
-80
80
-100
100
ps
33
Cycle to cycle clock period jitter
tJIT (cc)
-200
200
-250
250
ps
33
Cycle to cycle clock period jitter during
DLL locking period
tJIT (cc,lck)
-160
160
-200
200
ps
33
Cumulative error across 2 cycles
tERR (2per)
-150
150
-175
175
ps
33
Cumulative error across 3 cycles
tERR (3per)
-175
175
-225
225
ps
33
Cumulative error across 4 cycles
tERR (4per)
-200
200
-250
250
ps
33
Cumulative error across 5 cycles
tERR (5per)
-200
200
-250
250
ps
33
Cumulative error across n cycles,
n=6...10, inclusive
tERR (6-10per)
-300
300
-350
350
ps
33
Cumulative error across n cycles,
n=11...50, inclusive
tERR (11-50per)
-450
450
-450
450
ps
33
Duty cycle jitter
tJIT (duty)
-100
100
-125
125
ps
33
NOTE 34: These parameters are specified per their average values, however it is understood that the following
relationship between the average timing and the absolute instantaneous timing holds at all times. (Min and
max of SPEC values are to be used for calculations in the table below.)
Table 29. Absolute clock period average values
Parameter
Symbol
Min.
Max.
Unit
Absolute clock period
tCK (abs)
tCK(avg),min + tJIT(per),min
tCK(avg),max + tJIT(per),max
ps
Absolute clock HIGH pulse width
tCH (abs)
tCH(avg),min * tCK(avg),min +
tJIT(duty),min
tCH(avg),max * tCK(avg),max +
tJIT(duty),max
ps
Absolute clock LOW pulse width
tCL (abs)
tCL(avg),min * tCK(avg),min +
tJIT(duty),min
tCL(avg), max * tCK(avg),max +
tJIT(duty), max
ps
NOTE 35: tHP is the minimum of the absolute half period of the actual input clock. tHP is an input parameter but not
an input specification parameter. It is used in conjunction with tQHS to derive the DRAM output timing tQH. The
value to be used for tQH calculation is determined by the following equation;
tHP = Min ( tCH(abs), tCL(abs) ),
where,
tCH(abs) is the minimum of the actual instantaneous clock HIGH time;
tCL(abs) is the minimum of the actual instantaneous clock LOW time;
NOTE 36: tQHS accounts for:
1) The pulse duration distortion of on-chip clock circuits, which represents how well the actual tHP at the input is
transferred to the output; and
2) The worst case push-out of DQS on one transition followed by the worst case pull-in of DQ on the next



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