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HDMI2C2-14HD Datasheet(PDF) 17 Page - STMicroelectronics |
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HDMI2C2-14HD Datasheet(HTML) 17 Page - STMicroelectronics |
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17 / 31 page ![]() DocID024813 Rev1 17/31 HDMI2C2-14HD Electrical characteristics 31 Table 7. DDC bus (SDA and SCL lines) electrical characteristics(1) Symbol Parameter Test conditions Value Unit Min. Typ. Max. VTup_BUS Upward input voltage threshold on bus side 3.5 V VTdown_BUS Downward input voltage threshold on bus side 1.5 V VHYST_BUS Input hysteresis on bus side 1.0 1.3 V VOL_BUS Output low level Current sunk by SDA and SCL pin is 3 mA 0.35 V TRISE_BUS Output rise-time (30% to 70%) CBUS = 750 pF (2) RUP = 2 KΩ //47 KΩ + 10% (3) 500 ns TFALL_BUS Output fall-time (30% to 70%) 50 ns VTup_IC Upward input voltage threshold on IC side 55 60 65 %VDD_IC VTdown_IC Downward input voltage thresholds IC side 35 40 45 %VDD_IC VOL_IC Output low level on IC side Current sunk by SDA_IC or SCL_IC pins is 500 µA 20 mV CIN_DDC Input capacitance on DDC link VDD_5V = 0 V VDD_IC = 0 V VDD_CEC = 0 V VBIAS = 0 V, f = 1 MHz VOSC = 30 mV 917(4) pF VEN_DCC (5) DCC enabling 4.1 V 1. Tamb = 25 °C, VDD_5V = 5 V, VDD_IC = 1.8 V, unless otherwise specified 2. Maximum load capacitance allowed on I2C entire link (cable + connector) is 750 pF in HDMI 1.4 specification. 3. Two pull-up resistors in parallel (sink 47 k Ω + source 2 kΩ). 4. Maximum capacitance allowed at connector output is 50 pF in HDMI 1.4 specification 5. In order to activate the DCC lines, the level on DCC_EN pin has to reach the VEN_DCC min value. The inputs and ouputs of the bidirectional level shifters must be set to a high level after the power-on, and the HPD line has to be activated one time. |
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