AD9689-2000EBZ datasheet(50/134 Pages) AD

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AD9689

Data Sheet

Rev. A | Page 50 of 134

NCO FTW/POW/MAW/MAB Description

The NCO frequency value is determined by the following settings:

•

48-bit twos complement number entered in the FTW.

•

48-bit unsigned number entered in the MAW.

•

48-bit unsigned number entered in the MBW.

Frequencies between −fS/2 and +fS/2 (fS/2 excluded) are

represented using the following values:

•

FTW = 0x8000 0000 0000 and MAW = 0x0000 0000 0000

represents a frequency of −fS/2.

•

FTW = 0x0000 0000 0000 and MAW = 0x0000 0000 0000

represents dc (frequency is 0 Hz).

•

FTW = 0x7FFF FFFF FFFF and MAW = 0x0000 0000 0000

represents a frequency of +fS/2.

NCO FTW/POW/MAW/MAB Programmable Modulus

Mode

For programmable modulus mode, the MAW must be set to a

nonzero value (not equal to 0x0000 0000 0000). This mode is

only needed when frequency accuracy of >48 bits is required.

One example of a rational frequency synthesis requirement that

requires >48 bits of accuracy is a carrier frequency of 1/3 the

sample rate. When frequency accuracy of ≤48 bits is required,

coherent mode must be used (see the NCO FTW/POW/MAW/

MAB Coherent Mode section).

In programmable modulus mode, the FTW, MAW, and MBW

must satisfy the following four equations (for a detailed

description of the programmable modulus feature, see the DDS

architecture described in the AN-953 Application Note):

)

mod(

MBW

MAW

FTW

(1)

)

mod(

floor( 48

FTW =

(2)

MAW = mod(248 × M,N)

(3)

MBW = N

(4)

where:

fC is the desired carrier frequency.

fS is the ADC sampling frequency.

M is the integer representing the rational numerator of the

frequency ratio.

N is the integer representing the rational denominator of the

frequency ratio.

FTW is the 48-bit twos complement number representing the

NCO FTW.

MAW is the 48-bit unsigned number representing the NCO

MAW (must be <247).

MBW is the 48-bit unsigned number representing the NCO MBW.

mod(x) is a remainder function. For example, mod(110,100) =

10 and for negative numbers, mod(−32,10)= −2.

floor(x) is defined as the largest integer less than or equal to x.

For example, floor(3.6) = 3.

Note that Equation 1 to Equation 4 apply to the aliasing of

signals in the digital domain (that is, aliasing introduced when

digitizing analog signals).

M and N are integers reduced to their lowest terms. MAW and

MBW are integers reduced to their lowest terms. When MAW is

set to zero, the programmable modulus logic is automatically

disabled.

For example, if the ADC sampling frequency (fS) is 2600 MSPS

and the carrier frequency (fC) is 1001.5 MHz, then

5200

2003

2600

)

2600

1001

mod(

3590

F68C

0x629B

2600

)

2600

1001

mod(

floor 48













FTW

MAW = mod(248 × 2003, 5200) = 0x0000 0000 0300

MBW = 0x0000 0000 1450

The actual carrier frequency (fC_ACTUAL) can be calculated based

on the following equation:

ACTUAL

MBW

MAW

FTW

For the previous example, the actual carrier frequency (fC_ACTUAL) is

MHz

1001

1450

0000

0x0000

0300

0000

0x0000

3590

F68C

0x629B

ACTUAL

A 48-bit POW is available for each NCO to create a known

phase relationship between multiple chips or individual DDC

channels inside the chip.

While in programmable modulus mode, the FTW and POW

registers can be updated at any time while still maintaining

deterministic phase results in the NCO. However, the following

procedure must be followed to update the MAW and/or MBW

registers to ensure proper operation of the NCO:

1. Write to the MAW and MBW registers for all the DDCs.

2. Synchronize the NCOs either through the DDC soft reset

bit accessible through the SPI or through the assertion of

the SYSREF± pin (see the Memory Map section).

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