Electronic Components Datasheet Search
  New Zealand  ▼
ALLDATASHEET.CO.NZ

X  

AD9689-2000EBZ Datasheet(PDF) 120 Page - Analog Devices

Part # AD9689-2000EBZ
Description  Dual Analog-to-Digital Converter
PDF  134 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
Manufacturer  AD [Analog Devices]
Direct Link  http://www.analog.com
Logo AD - Analog Devices

AD9689-2000EBZ Datasheet(HTML) 120 Page - Analog Devices

Back Button AD9689-2000EBZ Datasheet HTML 116Page - Analog Devices AD9689-2000EBZ Datasheet HTML 117Page - Analog Devices AD9689-2000EBZ Datasheet HTML 118Page - Analog Devices AD9689-2000EBZ Datasheet HTML 119Page - Analog Devices AD9689-2000EBZ Datasheet HTML 120Page - Analog Devices AD9689-2000EBZ Datasheet HTML 121Page - Analog Devices AD9689-2000EBZ Datasheet HTML 122Page - Analog Devices AD9689-2000EBZ Datasheet HTML 123Page - Analog Devices AD9689-2000EBZ Datasheet HTML 124Page - Analog Devices Next Button
Zoom Inzoom in Zoom Outzoom out
 120 / 134 page
background image
AD9689
Data Sheet
Rev. A | Page 120 of 134
Addr.
Name
Bit(s) Bit Name
Setting
Description
Reset
Access
0
Link control
0x0
R/W
0
JESD204B serial transmit link enabled. Transmission of the /K28.5/
characters for code group synchronization is controlled by the SYNC~ pin.
1
JESD204B serial transmit link powered down (held in reset and clock
gated).
0x0572 JESD204B Link
Control 2
[7:6] SYNCINB± pin control
0x0
R/W
00
Normal mode.
10
Ignore SYNCINB± (force CGS).
11
Ignore SYNCINB± (force ILAS/user data).
5
SYNCINB± pin invert
0x0
R/W
0
SYNCINB± pin not inverted.
1
SYNCINB± pin inverted.
4
SYNCINB± pin type
0x0
R/W
0
LVDS differential pair SYNC~ input.
1
CMOS single-ended SYNC~ input. SYNCINB+ used.
3
Reserved
Reserved.
0x0
R
2
8-bit/10-bit bypass
0x0
R/W
0
8-bit/10-bit enabled.
1
8-bit/10-bit bypassed (most significant 2 bits are 0).
1
8-bit/10-bit invert
0x0
R/W
0
Normal.
1
Invert a, b, c, d, e, f, g, h, i, j, symbols.
0
Reserved
Reserved.
0x0
R/W
0x0573 JESD204B Link
Control 3
[7:6] Checksum mode
0x0
R/W
00
Checksum is the sum of all 8-bit registers in the link configuration
table.
01
Checksum is the sum of all individual link configuration fields (LSB
aligned).
10
Checksum is disabled (set to zero). For test purposes only.
11
Unused.
[5:4] Test injection point
0x0
R/W
0
N' sample input.
1
10-bit data at 8-bit/10-bit output (for PHY testing).
10
8-bit data at scrambler input.
[3:0] JESD204B test mode
patterns
0x0
R/W
0000
Normal operation (test mode disabled).
0001
Alternating checkerboard.
0010
1/0 word toggle.
0011
31-bit PN sequence: x31 + x28 + 1.
0100
23-bit PN sequence: x23 + x18 + 1.
0101
15-bit PN sequence: x15 + x14 + 1.
0110
9-bit PN sequence: x9 + x5 + 1.
0111
7-bit PN sequence: x7 + x6 + 1.
1000
Ramp output.
1110
Continuous/repeat user test.
1111
Single user test.



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100  ...More


Datasheet Download

Go To PDF Page


Link URL



Does ALLDATASHEET help your business so far?  [ DONATE ] 

About Alldatasheet   |   Advertisement   |   Contact us   |   Privacy Policy   |   Link to Datasheet    |   Link Exchange   |   Manufacturer List
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com