AD9689-2000EBZ datasheet(132/134 Pages) AD

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AD9689

Data Sheet

Rev. A | Page 132 of 134

APPLICATIONS INFORMATION

POWER SUPPLY RECOMMENDATIONS

The power supplies required to power the AD9689 are

shown in Table 54. A power-on sequence is not required to

operate the AD9689. The power supply domains can be

powered up in any order.

Table 54. Typical Power Supplies for the AD9689

Domain

Voltage (V)

Tolerance (%)

AVDD1

0.975

±2.5

AVDD1_SR

0.975

±2.5

DVDD

0.975

±2.5

DRVDD1

0.975

±2.5

AVDD2

1.9

±2.5

DRVDD2

1.9

±2.5

SPIVDD

1.9

±2.5

AVDD3

2.5

±2.5

For applications requiring an optimal high power efficiency and

low noise performance, it is recommended that the ADP5054

quad switching regulator be used to convert an input voltage in

the 6.0 V to 15 V range to intermediate rails (1.3 V, 2.4 V, and

3.0 V). These intermediate rails are then postregulated by very

low noise, low dropout (LDO) regulators (ADP1763, ADP7159,

and LT3045). Figure 157 shows the recommended power supply

scheme for the AD9689.

AVDD1

0.975V

1.3V

ANALOG

AVDD1_SR

0.975V

DVDD

0.975V

DRVDD1

0.975V

AVDD2

1.9V

DRVDD2

1.9V

ADP5054

6.0V

15.0V

AVDD3

2.5V

3.0V

LDO

SWITCHER

OPTIONAL PATH

1.3V

DIGITAL

OPTIONAL

2.4V

SPIVDD

1.9V

REFERENCED TO AGND

OPTIONAL

ADP1763

LT3045

Figure 157. High Efficiency, Low Noise Power Solution for the AD9689

It is not necessary to split all of these power domains in all cases.

The recommended solution shown in Figure 157 provides the

lowest noise, highest efficiency power delivery system for the

AD9689. If only one 0.975 V supply is available, route to AVDD1

first and then tap it off and isolate it with a ferrite bead or a

filter choke, preceded by decoupling capacitors for AVDD1_SR,

DVDD, and DRVDD1, in that order. Figure 158 shows the

simplified schematic. The dc resistance (DCR) of the ferrite

bead must be taken into consideration when choosing the

appropriate ferrite bead. Otherwise, excessive loss across the

ferrite bead can lead to a malfunctioning ADC. Adjustable LDOs

can be employed to output a higher voltage to account for the

drop across the ferrite bead.

Alternatively, the LDOs can be bypassed altogether and the

AD9689 can be driven directly from the dc-to-dc converter.

Note that this approach has risks in that there may be more

power supply noise inserted into the power supply domains of

the ADC. To minimize noise, follow the layout guidelines of the

dc-to-dc converter.

AVDD1

0.975V

1.3V

ANALOG

AVDD1_SR

0.975V

DVDD

0.975V

DRVDD1

0.975V

AVDD2

1.9V

DRVDD2

1.9V

ADP5054

12V FROM FMC OR

6.0V FROM WALL

SUPPLY

AVDD3

2.5V

3.0V

LDO

SWITCHER

OPTIONAL PATH

FERRITE BEAD

1.3V

DIGITAL

2.4V

SW3

SW4

SW1

SW2

ADP1763

LT3045

SPIVDD

1.9V

NOTES

1. ALL VOLTAGES REFERENCED TO AGND.

Figure 158. Simplified Power Solution for the AD9689

The user can employ several different decoupling capacitors to

cover both high and low frequencies. These capacitors must be

located close to the point of entry at the PCB level and close to

the devices, with minimal trace lengths.

AD9689-2000EBZ Datasheet(PDF) 132 Page - Analog Devices

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