SLG46121V datasheet(70/98 Pages) DIALOG

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SLG46121

12.0 Counters/Delay Generators (CNT/DLY)

There are two configurable counters/delay generators in the SLG46121. CNT/DLY0 is 14-bit and CNT/DLY2 is 8-bit. For flexibility,

each of these macrocells has a large selection of internal and external clock sources, as well as the option to chain from the output

of the previous (N-1) CNT/DLY macrocell, to implement longer count / delay circuits.

One of the counter/delay generator macrocells (CNT/DLY1) has two inputs from the connection matrix, one for Delay Input/Reset

Input (Delay_In/Reset_In), and one for an external counter/clock source.

Note that there are also two Combination Function Macrocells that can implemented as either 4-bit LUTs or 8-bit counter / delays,

For more information please see Section 10.4 4-Bit LUT or 8- Bit Counter / Delay Macrocells.

Figure 43. CNT/DLY0

CNT/DLY0

Counter_end

clk

To Connection

Matrix Input <23>

From Connection

Matrix Output <52>

Count_end_out_x-1

reg <548>

ext. clock from CM Out<52>

RC Osc/64

RC Osc/24

RC Osc/12

RC Osc/4

RC Osc

Counter Control Data

reg <565:552>

reg <551:549>

Delay_out

Delay_IN

CNT clock

Edge Detector

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