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BLUENRG-2 Datasheet(PDF) 150 Page - STMicroelectronics |
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BLUENRG-2 Datasheet(HTML) 150 Page - STMicroelectronics |
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150 / 190 page ![]() Functional details BlueNRG-2 150/190 DocID030675 Rev 2 An error value of 1 indicates that input point P does not satisfy the curve equation; in this case, the computation is very short. If the calculation returns an error value of 0, the result is valid. The maximum length of data is calculated by: Max. EOS = ( max_ecc_size / word_size) + 1 If ECC P256 is used, the PKA core needs an operand of 9 (256/32 + 1) words. When loading a 256-bit (8 word) input, an additional word is requested and must be filled with zero. The starting point P for the computation is: PX = (0x6B17D1F2, 0xE12C4247, 0xF8BCE6E5, 0x63A440F2, 0x77037D81, 0x2DEB33A0, 0xF4A13945, 0xD898C296) PY = (0x4FE342E2, 0xFE1A7F9B, 0x8EE7EB4A, 0x7C0F9E16, 0x2BCE3357, 0x6B315ECE, 0xCBB64068, 0x37BF51F5) 3.19.2 PKA registers PKA peripheral base address (PKA_BASE_ADDR) 0xC0000000 Table 205: PKA registers Address offset Name RW Reset Description 0x00 CSR RW 0x00000002 Command and status register 0x04 ISR RW 0x00000000 Interrupt status register 0x08 IEN RW 0x00000000 Interrupt enable register Table 206: PKA – CSR register description: address offset PKA_BASE_ADDR+0x00 Bit Field name Reset RW Description 0 GO 0 W PKA start processing command: 0: has no effect. 1: starts the processing. After this bitfield is set to 1, it must be written back to 0 manually. 1 READY 1 R PKA readiness status: 0: the PKA is computing. It is not ready. 1: the PKA is ready to start a new process. The rising edge of the READY bit set the PROC_END flag in the ISR register. 6:2 RESERVED 0x00 R RESERVED 7 SFT_RST 0 W PKA software reset: 0: has no effect. 1: reset the PKA peripheral. After this bitfield is set to 1, it must be written back to 0 manually. 31:8 RESERVED 0x00 R RESERVED |
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