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28F032B3 Datasheet(PDF) 15 Page - Intel Corporation

Part # 28F032B3
Description  SMART 3 ADVANCED BOOT BLOCK 4-, 8-, 16-, 32-MBIT FLASH MEMORY FAMILY
PDF  48 Pages
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Manufacturer  INTEL [Intel Corporation]
Direct Link  http://www.intel.com
Logo INTEL - Intel Corporation

28F032B3 Datasheet(HTML) 15 Page - Intel Corporation

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E
SMART 3 ADVANCED BOOT BLOCK
15
PRELIMINARY
Table 4. Command Codes and Descriptions (Continued)
Code
Device Mode
Description
D0
Erase Confirm
Program / Erase
Resume
If the previous command was an Erase Set-Up command, then the CUI will
close the address and data latches, and begin erasing the block indicated on the
address pins. During erase, the device will only respond to the Read Status
Register and Erase Suspend commands. The device will output status register
data when CE# or OE# is toggled.
If a program or erase operation was previously suspended, this command will
resume that operation
B0
Program / Erase
Suspend
Issuing this command will begin to suspend the currently executing
program/erase operation. The status register will indicate when the operation
has been successfully suspended by setting either the program suspend (SR.2)
or erase suspend (SR.6) and the WSM status bit (SR.7) to a “1” (ready). The
WSM will continue to idle in the SUSPEND state, regardless of the state of all
input control pins except RP#, which will immediately shut down the WSM and
the remainder of the chip if it is driven to VIL. See Sections 3.2.4.1 and 3.2.5.1.
70
Read Status
Register
This command places the device into read status register mode. Reading the
device will output the contents of the status register, regardless of the address
presented to the device. The device automatically enters this mode after a
program or erase operation has been initiated. See Section 3.2.3.
50
Clear Status
Register
The WSM can set the block lock status (SR.1) , V PP status (SR.3), program
status (SR.4), and erase status (SR.5) bits in the status register to “1,” but it
cannot clear them to “0.” Issuing this command clears those bits to “0.”
90
Read Identifier
Puts the device into the intelligent identifier read mode, so that reading the
device will output the manufacturer and device codes (A0 = 0 for manufacturer,
A0 = 1 for device, all other address inputs must be 0). See Section 3.2.2.
NOTE: See Appendix A for mode transition information.
3.2.2
READ IDENTIFIER
To read the manufacturer and device codes, the
device must be in read identifier mode, which can
be reached by writing the Read Identifier command
(90H). Once in read identifier mode, A0 = 0 outputs
the manufacturer’s identification code and A0 = 1
outputs the device identifier (see Table 5) Note:
A1—A21 = 0. To return to read array mode, write the
Read Array command (FFH).
Table 5. Read Identifier Table
Device Identifier
Size
Mfr. ID
-T
(Top Boot)
-B
(Bot. Boot)
28F400B3
0089H
8894H
8895H
28F008B3
0089H
D2
D3
28F800B3
8892H
8893H
28F016B3
0089H
D0
D1
28F160B3
8890H
8891H
28F032B3
0089H
D6
D7
28F320B3
8896
8897



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