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28F032B3 Datasheet(PDF) 27 Page - Intel Corporation |
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28F032B3 Datasheet(HTML) 27 Page - Intel Corporation |
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27 / 48 page  E SMART 3 ADVANCED BOOT BLOCK 27 PRELIMINARY TEST POINTS INPUT OUTPUT V CCQ 0.0 V CCQ 2 V CCQ 2 0580_05 NOTE: AC test inputs are driven at VCCQ for a logic “1” and 0.0V for a logic “0.” Input timing begins, and output timing ends, at VCCQ/2. Input rise and fall times (10%–90%) <10 ns. Worst case speed conditions are when VCCQ = VCCQMin. Figure 5. Input Range and Measurement Points C L Out V CCQ Device under Test R 1 R 2 0580_06 NOTE: See table for component values. Figure 6. Test Configuration Test Configuration Component Values for Worst Case Speed Conditions Test Configuration CL (pF) R1 ( Ω)R2 (Ω) VCCQ1 Standard Test 50 25 K 25 K VCCQ2 Standard Test 50 16.7 K 16.7 K NOTE: CL includes jig capacitance. |
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