 |
Electronic Components Datasheet Search |
|
|
Electronic Components Datasheet Search |
|
FS98O02B-PCE Datasheet(PDF) 43 Page - Fortune Semiconductor Corp. |
|
|
|||||||||||||||||||||||||||||
FS98O02B-PCE Datasheet(HTML) 43 Page - Fortune Semiconductor Corp. |
|
|
43 / 50 page  FS98O02 Rev.1.5 43/50 21.2 Instruction Description The instruction descriptions are sort by alphabetically. ADDLW Add Literal to W Syntax ADDLW k 0 ≤ k ≤ FFh Operation [W] ← [W] + k Flag Affected C, DC, Z Description The content of Work register add literal “k” in Work register Cycle 1 Example: ADDLW 08h Before instruction: W = 08h After instruction: W = 10h ADDPCW Add W to PC Syntax ADDPCW Operation [PC] ← [PC] + 1 + [W], [W] < 79h [PC] ← [PC] + 1 + ([W] – 100h), otherwise Flag Affected None Description The relative address PC + 1 + W are loaded into PC. Cycle 2 Example 1: ADDPCW Before instruction: W = 7Fh, PC = 0212h After instruction: PC = 0292h Example 2: ADDPCW Before instruction: W = 80h, PC = 0212h After instruction: PC = 0193h Example 3: ADDPCW Before instruction: W = FEh, PC = 0212h After instruction: PC = 0211h ADDWF Add W to f Syntax ADDWF f, d 0 ≤ f ≤ FFh d ∈ [0,1] Operation [Destination] ← [f] + [W] Flag Affected C, CD, Z Description Add the content of the W register and [f]. If d is 0, the result is stored in the W register. If d is 1, the result is stored back in f. Cycle 1 Example 1: ADDWF OPERAND, 0 Before instruction: OPERAND = C2h W = 17h After instruction: OPERAND = C2h W = D9h Example 2: ADDWF OPERAND, 1 Before instruction: OPERAND = C2h W = 17h After instruction: OPERAND = D9h W = 17h ADDWFC Add W, f and Carry Syntax ADDWFC f, d 0 ≤ f ≤ FFh d ∈ [0,1] Operation [Destination] ← [f] + [W] + C Flag Affected C, DC, Z Description Add the content of the W register, [f] and Carry bit. If d is 0, the result is stored in the W register. If d is 1, the result is stored back in f. Cycle 1 Example ADDWFC OPERAND,1 Before instruction: C = 1 OPERAND = 02h W = 4Dh After instruction: C = 0 OPERAND = 50h W = 4Dh ANDLW AND literal with W Syntax ANDLW k 0 ≤ k ≤ FFh Operation [W] ← [W] AND k Flag Affected Z Description AND the content of the W register with the eight-bit literal "k". The result is stored in the W register. Cycle 1 Example: ANDLW 5Fh Before instruction: W = A3h After instruction: W = 03h ANDWF AND W and f Syntax ANDWF f, d 0 ≤ f ≤ FFh d ∈ [0,1] Operation [Destination] ← [W] AND [f] |
|
Link URL |
| Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Contact us | Privacy Policy | Link to Datasheet | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |
New Zealand ▼
English
Chinese
German
Japanese
Russian
Korean
Spanish
French
Italian
Portuguese
Polish
Vietnamese
Indian
Mexican
British
New Zealand
