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FS98O02B-PCE Datasheet(PDF) 19 Page - Fortune Semiconductor Corp. |
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FS98O02B-PCE Datasheet(HTML) 19 Page - Fortune Semiconductor Corp. |
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19 / 50 page  FS98O02 Rev.1.5 19/50 Address Name Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 Reset State WDT Reset State Details on page: 12h ADOL ADO [7:0] 0000 0000 0000 0000 29 13h ADCON ADRST ADM [2:0] ---- 0000 ---- 0000 29 1Fh SVD SVD ---- ---1 ---- ---1 19, 22 20h PT1 PT1 [7:0] uuuu uuuu uuuu uuuu 25 21h PT1EN PT1EN[7:4] 0000 ---- 0000 ---- 25 22h PT1PU PT1PU [7:0] 0000 0000 0000 0000 25 23h PT1MR BPE EN_LBDAIN E0M [1:0] 00-- --00 00-- --00 25 24h PT2 PT2 [3:0] ---- uuuu ---- uuuu 26 25h PT2EN PT2EN [3:0] ---- 0000 ---- 0000 26 26h PT2PU PT2PU [3:0] ---- 0000 ---- 0000 26 2Ah NETB SINL[1:0] SINH [1:0] SFT [2] SFT [0] -000 00-0 -000 00-0 30 2Ch NETD EPMAT SVRH[0] SVRL[1:0] ERV EPBLK SLVD SVR u000 uu00 u000 uu00 30, 35 2Eh NETF EN_PUMP EN_VS EN_LCDB LCDEN EN_VGG3 EN_VDDAPU EN_VDDA25 EN_VDDA 0000 0100 0000 0100 19, 36 2Fh NETG ADG [1:0] ADEN AZ ---- 0000 ---- 0000 29 33h NETK SILB[2:0] EN_LB OP1EN SOP1P[1:0] SOP1N 0000 0000 0000 0000 22, 34 40h LCD1 SEG1 [3:0] SEG0 [3:0] uuuu uuuu uuuu uuuu 36 41h LCD2 SEG3 [3:0] SEG2 [3:0] uuuu uuuu uuuu uuuu 36 42h LCD3 SEG5 [3:0] SEG4 [3:0] uuuu uuuu uuuu uuuu 36 43h LCD4 SEG7 [3:0] SEG6 [3:0] uuuu uuuu uuuu uuuu 36 44h LCD5 SEG9 [3:0] SEG8 [3:0] uuuu uuuu uuuu uuuu 36 45h LCD6 SEG11 [3:0] SEG10 [3:0] uuuu uuuu uuuu uuuu 36 Note 1: “u” means unknown or unchanged. “-“ means unimplemented, read as “0”. Note 2: The “Reset State” indicates the registers state after external reset and low voltage reset. Note 3: The “WDT Reset State” indicates the registers state after watchdog time out reset. 12. Power System There’re some important power management blocks in FS98O02, such as voltage doublers, voltage regulator, analog bias circuit, analog common voltage generator, etc. The power system related registers are in Table 12-1. Table 12-1: Power System Related Registers Address Name Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 Reset State WDT Reset State 1Fh SVD SVD ---- ---1 ---- ---1 2Eh NETF EN_PUMP EN_VS EN_LCDB LCDEN EN_VGG3 EN_VDDAPU EN_VDDA25 EN_VDDA 0000 0100 0000 0100 33h NETK SILB[2:0] EN_LB 0000 0000 0000 0000 12.1 Voltage Doubler The voltage doubler is used to generate double voltage of VDDP or 3V VGG output. The doubled voltage of VDDP is used for regulator power supply and the 3V VGG output can be used for LCD power supply. When voltage doubler is turned off（EN_PUMP = 0）, the default VGG is shorted to VDDP and this VGG output can be used for LCD power supply. During the LCD application, if the VDDP voltage is reduced, the brightness of the LCD may be darkened. User can turn on voltage doubler by EN_PUMP after setting the EN_VGG3 to pump the VGG voltage to 3V to supply LCD circuit. It can lighten LCD and hold the LCD brightness. |
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