| Electronic Components Datasheet Search |
|
FS98O02B-PCE Datasheet(PDF) 45 Page - Fortune Semiconductor Corp. |
|
|
|||||||||||||||||||||||||||||
FS98O02B-PCE Datasheet(HTML) 45 Page - Fortune Semiconductor Corp. |
|
45 / 50 page ![]() FS98O02 Rev.1.5 45/50 Description Reset the content of memory address f Cycle 1 Example: CLRF WORK Before instruction: WORK = 5Ah After instruction: WORK = 00h CLRWDT Clear watch dog timer Syntax CLRWDT Operation Watch dog timer counter will be reset Flag Affected None Description CLRWDT instruction will reset watch dog timer counter. Cycle 1 Example: CLRWDT After instruction: WDT = 0 COMF Complement f Syntax COMF f, d 0 ≤ f ≤ 255 d ∈ [0,1] Operation [f] ← NOT([f]) Flag Affected Z Description [f] is complemented. If d is 0, the result is stored in the W register. If d is 1, the result is stored back in [f] Cycle 1 Example 1: COMF OPERAND,0 Before instruction: W = 88h, OPERAND = 23h After instruction: W = DCh, OPERAND = 23h Example 2: COMF OPERAND,1 Before instruction: W = 88h, OPERAND = 23h After instruction: W = 88h, OPERAND = DCh DECF Decrement f Syntax DECF f, d 0 ≤ f ≤ 255 d ∈ [0,1] Operation [Destination] ← [f] -1 Flag Affected Z Description [f] is decremented. If d is 0, the result is stored in the W register. If d is 1, the result is stored back in [f]. Cycle 1 Example 1: DECF OPERAND,0 Before instruction: W = 88h, OPERAND = 23h After instruction: W = 22h, OPERAND = 23h Example 2: DECF OPERAND,1 Before instruction: W = 88h, OPERAND = 23h After instruction: W = 88h, OPERAND = 22h DECFSZ Decrement f, skip if zero Syntax DECFSZ f, d 0 ≤ f ≤ FFh d ∈ [0,1] Operation [Destination] ← [f] -1, skip if the result is zero Flag Affected None Description [f] is decremented. If d is 0, the result is stored in the W register. If d is 1, the result is stored back in [f]. If the result is 0, then the next fetched instruction is discarded and a NOP is executed instead making it a two-cycle instruction. Cycle 1, 2 Example: Node DECFSZ FLAG, 1 OP1 : OP2 : Before instruction: PC = address (Node) After instruction: [FLAG] = [FLAG] - 1 If [FLAG] = 0 PC = address(OP1) If [FLAG] ≠ 0 PC = address(OP2) GOTO Unconditional Branch Syntax GOTO k 0 ≤ k ≤ 1FFFh Operation PC ← k Flag Affected None Description The immediate address is loaded into PC. Cycle 2 Example: GOTO THERE After instruction: PC = address (THERE) HALT Stop CPU Core Clock Syntax HALT Operation CPU Stop |
|
Link URL |
| Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Contact us | Privacy Policy | Link to Datasheet | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |