FS98O02B-PCE datasheet(18/50 Pages) FORTUNE

18 / 50 page

FS98O02

Rev.1.5

18/50

The INTF register contains the status of every interrupt event. The function of each bit in INTF register is

described in Table 11-4.

Table 11-4: INTF Register

Bit

Symbol

Description

7~5

No use.

TMIF

8-bit timer Interrupt flag.

3~2

No use.

ADIF

Analog to digital converter Interrupt flag.

E0IF

PT1<0> external interrupt flag.

The INTE register defines if the CPU will accept related interrupt event. The function of each bit in INTE

Table 11-5: INTE Register

Bit

Symbol

Description

GIE

Global interrupt enable bit.

6~5

No use.

TMIE

8-bit timer Interrupt enable bit.

3~2

No use.

ADIE

Analog to digital converter Interrupt enable bit.

E0IE

PT1<0> external interrupt enable bit.

11.4 Peripheral Special Registers

The peripheral special registers are used to control I/O ports, timer, ADC, signal conditional network, LCD

driver, and others.

Table 11-6: Peripheral Special Registers

Address Name

Bit 7

Bit 6

Bit 5

Bit 4

Bit 3

Bit 2

Bit 1

Bit 0

Reset

State

WDT

Reset

State

Details

page:

09h

PCK

S_CHCK[1:0]

S_BEEP

EN_OSC4M ---- 0000

---- 0000

24, 25

0Ah

EADRH PAR[15:8]

uuuu uuuu uuuu uuuu 35

0Bh

EADRL PAR[7:0]

uuuu uuuu uuuu uuuu 35

0Ch

EDAH

EDATA[15:8]

uuuu uuuu uuuu uuuu 35

0Dh

TMOUT TMOUT [7:0]

0000 0000 0000 0000 25, 27

0Eh

TMCON TMRST WDTEN

WTS [1:0]

TMEN

INS [2:0]

1000 0000 1u00 0000 25, 27

0Fh

TMMOD TMMOD [7:0]

0000 0000 0000 0000 27

10h

ADOH

ADO [23:16]

0000 0000 0000 0000 29

11h

ADOM

ADO [15:8]

0000 0000 0000 0000 29

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