 |
Electronic Components Datasheet Search |
|
|
Electronic Components Datasheet Search |
|
FS98O02B-PCE Datasheet(PDF) 46 Page - Fortune Semiconductor Corp. |
|
|
|||||||||||||||||||||||||||||
FS98O02B-PCE Datasheet(HTML) 46 Page - Fortune Semiconductor Corp. |
|
|
46 / 50 page  FS98O02 Rev.1.5 46/50 Flag Affected None Description CPU clock is stopped. Oscillator is running. CPU can be waked up by internal and external interrupt sources. Cycle 1 INCF Increment f Syntax INCF f, d 0 ≤ f ≤ FFh d ∈ [0,1] Operation [Destination] ← [f] +1 Flag Affected Z Description [f] is incremented. If d is 0, the result is stored in the W register. If d is 1, the result is stored back in [f]. Cycle 1 Example 1: INCF OPERAND,0 Before instruction: W = 88h, OPERAND = 23h After instruction: W = 24h, OPERAND = 23h Example 2: INCF OPERAND,1 Before instruction: W = 88h, OPERAND = 23h After instruction: W = 88h, OPERAND = 24h INCFSZ Increment f, skip if zero Syntax INCFSZ f, d 0 ≤ f ≤ FFh d ∈ [0,1] Operation [Destination] ← [f] + 1, skip if the result is zero Flag Affected None Description [f] is incremented. If d is 0, the result is stored in the W register. If d is 1, the result is stored back in [f]. If the result is 0, then the next fetched instruction is discarded and a NOP is executed instead making it a two-cycle instruction. Cycle 1, 2 Example: Node INCFSZ FLAG, 1 OP1 : OP2 : Before instruction: PC = address (Node) After instruction: [FLAG] = [FLAG] + 1 If [FLAG] = 0 PC = address(OP2) If [FLAG] ≠ 0 PC = address(OP1) IORLW Inclusive OR literal with W Syntax IORLW k 0 ≤ k ≤ FFh Operation [W] ← [W] | k Flag Affected Z Description Inclusive OR the content of the W register and the eight-bit literal "k". The result is stored in the W register. Cycle 1 Example: IORLW 85H Before instruction: W = 69h After instruction: W = EDh IORWF Inclusive OR W with f Syntax IORWF f, d 0 ≤ f ≤ FFh d ∈ [0,1] Operation [Destination] ← [W] | [f] Flag Affected Z Description Inclusive OR the content of the W register and [f]. If d is 0, the result is stored in the W register. If d is 1, the result is stored back in [f]. Cycle 1 Example: IORWF OPERAND,1 Before instruction: W = 88h, OPERAND = 23h After instruction: W = 88h, OPERAND = ABh MOVFW Move f to W Syntax MOVFW f 0 ≤ f ≤ FFh Operation [W] ← [f] Flag Affected None Description Move data from [f] to the W register. Cycle 1 Example: MOVFW OPERAND Before instruction: W = 88h, OPERAND = 23h After instruction: W = 23h, OPERAND = 23h MOVLW Move literal to W Syntax MOVLW k 0 ≤ k ≤ FFh Operation [W] ← k Flag Affected None Description Move the eight-bit literal "k" |
|
Link URL |
| Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Contact us | Privacy Policy | Link to Datasheet | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |
New Zealand ▼
English
Chinese
German
Japanese
Russian
Korean
Spanish
French
Italian
Portuguese
Polish
Vietnamese
Indian
Mexican
British
New Zealand
