ZSSC3018 Datasheet

© 2020 Renesas Electronics Corporation

10

September 8, 2020

2. Circuit Description

2.1 Brief Description

The ZSSC3018 provides a highly accurate amplification of bridge sensor signals. The compensation of sensor offset, sensitivity, temperature

drift, and non-linearity is accomplished via a 26-bit DSP core running a correction algorithm with calibration coefficients stored in a non-volatile

memory. The ZSSC3018 can be configured for a wide range of resistive bridge sensor types and for absolute voltage-source sensors. A digital

Mode is the standard operating mode. Typically in Normal Mode, the ZSSC3018 wakes up from Sleep Mode (low power), runs a measurement

in Active State, and automatically returns to the Sleep Mode. (See section 3.3 for details on operational modes.)

2.2 Signal Flow and Block Diagram

for analog circuitry are provided by a voltage regulator, which is optimized for power supply disturbance rejection (PSRR). See section 1.4 for

a graph of PSRR versus frequency. To improve noise suppression, the digital blocks are powered by a separate voltage regulator. A power

supervision circuit monitors all supply voltages and generates appropriate reset signals for initializing the digital blocks.

The System Control Unit controls the analog circuitry to perform the three measurement types: external sensor, temperature, and offset

measurement. The multiplexer selects the signal input to the amplifier, which can be the external signals from the input pins INP and INN or the

internal temperature reference sensor signals. A full measurement request will trigger an automatic sequence of all measurement types and all

input signals.

Figure 2.1 ZSSC3018 Functional Block Diagram, Resistive-Bridge-Sensor

Sensor

Bridge

AGND / CM

Generator

Bias Current

Generator

Power-ON

Reset

Temperature

Reference

Sensor

DSP Core

(Calculations,

Communication)

MTP

System

Control Unit

Pre-Amplifier

EOC

INP

INN

VDD

VSSB

Oscillator

Clock Generator

SPI

I²C

SCLK/SCL

MISO

MOSI/SDA

SS

VSS

Power Ctr.

Vreg int

A

18 Bit

VDDB

ZSSC3018

RES

D

PGA

ADC

18 bit

MUX

Voltage Regulator

Analog

Digital

Interface

Functionality Support