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ADF4401ABCEZ Datasheet(PDF) 22 Page - Analog Devices |
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ADF4401ABCEZ Datasheet(HTML) 22 Page - Analog Devices |
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22 / 39 page  ADF4401A Data Sheet Rev. 0 | Page 22 of 39 REGISTER SUMMARY Table 8. ADF4401A Register Summary Reg Bits Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 Default RW 0x00 [7:0] SOFT_RESET_R LSB_FIRST_R ADDRESS_ ASCENSION_R SDO_ACTIVE_R SDO_ACTIVE ADDRESS_ ASCENSION LSB_FIRST SOFT_RESET 0x18 R/W 0x01 [7:0] SINGLE_ INSTRUCTION STALLING MASTER_ READBACK_ CONTROL RESERVED 0x00 R/W 0x10 [7:0] BIT_INTEGER_WORD[7:0] 0x32 R/W 0x11 [7:0] BIT_INTEGER_WORD[15:8] 0x00 R/W 0x12 [7:0] RESERVED EN_AUTOCAL PRE_SEL RESERVED 0x40 R/W 0x14 [7:0] FRAC1WORD[7:0] 0x00 R/W 0x15 [7:0] FRAC1WORD[15:8] 0x00 R/W 0x16 [7:0] FRAC1WORD[23:16] 0x00 R/W 0x17 [7:0] FRAC2WORD[6:0] FRAC1WORD [24] 0x00 R/W 0x18 [7:0] RESERVED FRAC2WORD[13:7] 0x00 R/W 0x19 [7:0] MOD2WORD[7:0] 0xE8 R/W 0x1A [7:0] RESERVED MOD2WORD[13:8] 0x03 R/W 0x1E [7:0] CP_CURRENT PD_POL PD RESERVED CNTR_RESET 0x48 R/W 0x1F [7:0] RESERVED R_WORD 0x01 R/W 0x20 [7:0] MUXOUT MUXOUT_EN LEV_SEL RESERVED 0x14 R/W 0x22 [7:0] RESERVED REFIN_MODE RESERVED RDIV2 RESERVED 0x00 R/W 0x24 [7:0] FB_SEL DIV_SEL RESERVED 0x80 R/W 0x25 [7:0] RESERVED RF_DIVSEL_ DB RESERVED RF_EN RF_OUT_POWER 0x07 R/W 0x27 [7:0] LD_BIAS LDP RESERVED 0xC5 R/W 0x28 [7:0] DOUBLE_BUFF RESERVED LD_COUNT LOL_EN 0x03 R/W 0x2B [7:0] RESERVED LSB_P1 VAR_MOD_EN RESERVED SD_LOAD_ ENB RESERVED SD_EN_ FRAC0 0x01 R/W 0x2C [7:0] RESERVED ALC_RECT_ SELECT_ VCO1 ALC_REF_ DAC_LO_ VCO1 ALC_REF_DAC_NOM_VCO1 VTUNE_ CALSET_EN DISABLE_ALC 0x44 R/W 0x2D [7:0] RESERVED ALC_RECT_ SELECT_VCO2 ALC_REF_DAC_ LO_VCO2 ALC_REF_DAC_NOM_VCO2 0x11 R/W 0x2E [7:0] RESERVED ALC_RECT_ SELECT_VCO3 ALC_REF_DAC_ LO_VCO3 ALC_REF_DAC_NOM_VCO3 0x12 R/W 0x2F [7:0] RESERVED ALC_RECT_ SELECT_VCO4 ALC_REF_DAC_L O_VCO4 ALC_REF_DAC_NOM_VCO4 0x94 R/W 0x30 [7:0] VCO_BAND_DIV 0x3F R/W 0x31 [7:0] TIMEOUT[7:0] 0xA7 R/W 0x32 [7:0] ADC_MUX_ SEL RESERVED ADC_FAST_ CONV ADC_CTS_ CONV ADC_ CONVERSION ADC_ ENABLE TIMEOUT[9:8] 0x04 R/W 0x33 [7:0] RESERVED SYNTH_LOCK_TIMEOUT 0x0C R/W 0x34 [7:0] VCO_FSM_TEST_MODES VCO_ALC_TIMEOUT 0x9E R/W 0x35 [7:0] ADC_CLK_DIVIDER 0x4C R/W 0x36 [7:0] ICP_ADJUST_OFFSET 0x30 R/W 0x37 [7:0] SI_BAND_SEL 0x00 R/W 0x38 [7:0] SI_VCO_SEL SI_VCO_BIAS_CODE 0x00 R/W 0x39 [7:0] RESERVED VCO_FSM_TEST_MUX_SEL SI_VTUNE_CAL_SET 0x07 R/W 0x3A [7:0] ADC_OFFSET 0x55 R/W 0x3E [7:0] RESERVED CP_TMODE RESERVED 0x0C R/W 0x3F [7:0] RESERVED 0x80 R/W 0x40 [7:0] RESERVED 0x50 R/W 0x41 [7:0] RESERVED 0x28 R/W 0x47 [7:0] RESERVED 0xC0 R/W 0x52 [7:0] RESERVED 0xF4 R/W 0x6E [7:0] VCO_DATA_READBACK[7:0] 0x00 R 0x6F [7:0] VCO_DATA_READBACK[15:8] 0x00 R 0x72 [7:0] RESERVED AUX_FREQ_ SEL POUT_AUX PDB_AUX RESERVED 0x32 R/W 0x73 [7:0] RESERVED ADC_CLK_ DISABLE PD_NDIV LD_DIV 0x00 R/W 0x7C [7:0] RESERVED LOCK_DETECT _READBACK 0x00 R |
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