STM32H723VG datasheet(201/227 Pages) STMICROELECTRONICS

201 / 227 page

DS13313 Rev 2

201/227

STM32H723xE/G

Electrical characteristics

208

CMD, D inputs (referenced to CK) in SD default mode

tISUD

Input setup time SD

1.5

tIHD

Input hold time SD

0.5

CMD, D outputs (referenced to CK) in SD default mode

tOVD

Output valid default time SD

tOHD

Output hold default time SD

1. Guaranteed by characterization results.

2. Above 100 MHz, CL = 20 pF.

3. The minimum window of time where the data needs to be stable for proper sampling in tuning mode.

Table 112. Dynamics characteristics: eMMC characteristics VDD=1.71V to 1.9V(1)(2)

1. Guaranteed by characterization results.

2. CL = 20 pF.

Symbol

Parameter

Conditions

Min

Typ

Max

Unit

fPP

Clock frequency in data transfer

mode

-0

MHz

SDIO_CK/fPCLK2 frequency ratio

8/3

tW(CKL)

Clock low time

fPP =52 MHz

8.5

9.5

tW(CKH)

Clock high time

8.5

9.5

CMD, D inputs (referenced to CK) in eMMC mode

tISU

Input setup time HS

1.5

tIH

Input hold time HS

1.5

tIDW(3)

3. The minimum window of time where the data needs to be stable for proper sampling in tuning mode.

Input valid window (variable

window)

-3.5

CMD, D outputs (referenced to CK) in eMMC mode

tOVD

Output valid time HS

6.5

tOHD

Output hold time HS

5.5

Table 111. Dynamics characteristics: SD / MMC characteristics, VDD=2.7 to 3.6 V(1)(2)

Symbol

Parameter

Conditions

Min

Typ

Max

Unit

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