| Electronic Components Datasheet Search |
|
MPF7100BVBA0ES Datasheet(PDF) 21 Page - NXP Semiconductors |
|
|
|||||||||||||||||||||||||||||
MPF7100BVBA0ES Datasheet(HTML) 21 Page - NXP Semiconductors |
|
21 / 125 page ![]() NXP Semiconductors PF7100 7-channel power management integrated circuit for high performance applications PF7100 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2021. All rights reserved. Product data sheet Rev. 4 — 9 March 2021 21 / 125 FS_CNT[3:0] is 0x00. The FS_CNT[3:0] may be manually cleared during the system-on state if the system wants to control this counter manually. 14 General device operation 14.1 UVDET UVDET works as the main operation threshold for the PF7100. Crossing UVDET on the rising edge is a mandatory condition for OTP fuses to be loaded into the mirror registers and allows the main PF7100 operation. If VIN is below the UVDET threshold, the device remains in an unpowered state. A 200 mV hysteresis is implemented on the UVDET comparator to set the falling threshold. Table 13. UVDET threshold Symbol Parameter Min Typ Max Unit UVDET Rising UVDET 2.7 2.8 2.9 V UVDET Falling UVDET 2.5 2.6 2.7 V 14.2 VIN OVLO condition The VIN_OVLO circuit monitors the main input supply of the PF7100. When this block is enabled, the PF7100 monitors its input voltage and can be programmed to react to an overvoltage in two ways: • When the VIN_OVLO_SDWN = 0, the VIN_OVLO event triggers an OVLO interrupt but does not turn off the device • When the VIN_OVLO_SDWN = 1, the VIN_OVLO event initiates a power down sequence When the VIN_OVLO_EN = 0, the OVLO monitor is disabled and when the VIN_OVLO_EN = 1, the OVLO monitor is enabled. The default configuration of the VIN_OVLO_EN bit is set by the OTP_VIN_OVLO_EN bit in OTP. Likewise, the default value of the VIN_OVLO_SDWN bit is set by the OTP_VIN_OVLO_SDWN upon power up. During a power up transition, if the OTP_VIN_OVLO_SDWN = 0, the device allows the external regulators to come up and the PF7100 announces the VIN_OVLO condition through an interrupt after RESETBMCU is de-asserted. If the OTP_VIN_OVLO_SDWN = 1, the device stops the power up sequence and returns to the corresponding OFF mode. Debounce on the VIN_OVLO comparator is programmable to 10 µs, 100 µs or 1.0 ms, by the VIN_OVLO_DBNC[1:0] bits. The default value for the VIN_OVLO debounce is set by the OTP_VIN_OVLO_DBNC[1:0] bits upon power up. Table 14. VIN_OVLO debounce configuration VIN_OVLO_DBNC[1:0] VIN OVLO debounce value (µs) 00 10 01 100 10 1000 11 Reserved |
|
Link URL |
| Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Contact us | Privacy Policy | Link to Datasheet | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |