AD7124-4TRUZ-EP-R7 datasheet(6/17 Pages) AD

6 / 17 page

AD7124-4-EP

Enhanced Product

Rev. 0 | Page 6 of 17

Parameter1

Min

Typ

Max

Unit

Test Conditions/Comments

ANALOG INPUTS11

Differential Input Voltage Ranges12

±VREF/gain

VREF = REFINx(+) − REFINx(−), or

internal reference

Absolute AIN Voltage Limits2

Gain = 1 (Unbuffered)

AVSS − 0.05

AVDD + 0.05

Gain = 1 (Buffered)

AVSS + 0.1

AVDD − 0.1

Gain > 1

AVSS − 0.05

AVDD + 0.05

Analog Input Current

Gain > 1 or Gain = 1 (Buffered)

Low Power Mode

Absolute Input Current

±1

Differential Input Current

±0.2

Analog Input Current Drift

pA/°C

Mid Power Mode

Absolute Input Current

±1.2

Differential Input Current

±0.4

Analog Input Current Drift

pA/°C

Full Power Mode

Absolute Input Current

±3.3

Differential Input Current

±1.5

Analog Input Current Drift

pA/°C

Gain = 1 (Unbuffered)

Current varies with input voltage

Absolute Input Current

±2.65

μA/V

Analog Input Current Drift

1.1

nA/V/°C

REFERENCE INPUT

Internal Reference

Initial Accuracy

2.5 − 0.2%

2.5

2.5 + 0.2%

TA = 25°C

Drift

ppm/°C

Output Current

Load Regulation

μV/mA

Power Supply Rejection

External Reference

External REFIN Voltage2

0.5

2.5

AVDD

REFIN = REFINx(+) − REFINx(−)

Absolute REFIN Voltage Limits2

AVSS − 0.05

AVDD + 0.05

Unbuffered

AVSS + 0.1

AVDD − 0.1

Buffered

Reference Input Current

Buffered

Low Power Mode

Absolute Input Current

±0.5

Reference Input Current Drift

pA/°C

Mid Power Mode

Absolute Input Current

±1

Reference Input Current Drift

pA/°C

Full Power Mode

Absolute Input Current

±3

Reference Input Current Drift

pA/°C

Unbuffered

Absolute Input Current

±12

μA

Reference Input Current Drift

nA/°C

Normal Mode Rejection

Same as for analog inputs

Common-Mode Rejection

100

AD7124-4TRUZ-EP-R7 Datasheet(PDF) 6 Page - Analog Devices

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