AD7124-4TRUZ-EP-R7 datasheet(1/17 Pages) AD

Part #	AD7124-4TRUZ-EP-R7

Description	4-Channel, Low Noise, Low Power, 24-Bit, Sigma-Delta ADC with PGA and Reference

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Manufacturer	AD [Analog Devices]

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4-Channel, Low Noise, Low Power, 24-Bit,

Sigma-Delta ADC with PGA and Reference

Enhanced Product

AD7124-4-EP

Rev. 0

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FEATURES

3 power modes

RMS noise

Low power: 24 nV rms at 1.17 SPS, gain = 128 (255 μA typical)

Mid power: 20 nV rms at 2.34 SPS, gain = 128 (355 μA typical)

Full power: 23 nV rms at 9.4 SPS, gain = 128 (930 μA typical)

Up to 22 noise free bits in all power modes (gain = 1)

Output data rate

Full power: 9.38 SPS to 19,200 SPS

Mid power: 2.34 SPS to 4800 SPS

Low power: 1.17 SPS to 2400 SPS

Rail-to-rail analog inputs for gains > 1

Simultaneous 50 Hz/60 Hz rejection at 25 SPS (single cycle

settling)

Diagnostic functions (which aid safe integrity level (SIL)

certification)

Crosspoint multiplexed analog inputs

4 differential/7 pseudo differential inputs

Programmable gain (1 to 128)

Band gap reference with 10 ppm/°C drift maximum (70 μA)

Matched programmable excitation currents

Internal clock oscillator and temperature sensor

On-chip bias voltage generator

Low-side power switch

Multiple filter options

Sensor burnout detection

Automatic channel sequencer

Per channel configuration

Power-down current: 5 μA maximum

24-lead TSSOP

3-wire or 4-wire serial interface

SPI, QSPI, MICROWIRE, and DSP compatible

Schmitt trigger on SCLK

ENHANCED PRODUCT FEATURES

Supports defense and aerospace applications (AQEC standard)

Full military temperature range: −55°C to +125°C

Controlled manufacturing baseline

1 assembly/test site

1 fabrication site

Product change notification

Qualification data available on request

APPLICATIONS

Military and space

Avionics

Pressure measurement

Instrumentation

FUNCTIONAL BLOCK DIAGRAM

TEMPERATURE

SENSOR

BANDGAP

REF

VBIAS

SERIAL

INTERFACE

AND

CONTROL

LOGIC

INTERNAL

CLOCK

CLK

SCLK

DIN

SYNC

REGCAPD

IOVDD

AD7124-4-EP

AVSS

DGND

24-BIT

Σ-∆ ADC

X-MUX

REFIN1(+)

AVDD

AVSS

REFOUT

AVDD

AVSS

PSW

VARIABLE

DIGITAL

FILTER

DIAGNOSTICS

COMMUNICATIONS

POWER SUPPLY

SIGNAL CHAIN

DIGITAL

REFIN1(–)

REFIN2(+)

REFIN2(–)

BURNOUT

DETECT

EXCITATION

CURRENTS

POWER

SWITCH

GPOs

CHANNEL

SEQUENCER

CROSSPOINT

MUX

REGCAPA

AVDD

1.9V

LDO

DIAGNOSTICS

AVDD

AVSS

DOUT/RDY

CS

1.8V

LDO

ANALOG

BUFFERS

REFERENCE

BUFFERS

BUF

PGA2

PGA1

AIN0/IOUT/VBIAS

AIN1/IOUT/VBIAS

AIN2/IOUT/VBIAS/P1

AIN3/IOUT/VBIAS/P2

AIN4/IOUT/VBIAS

AIN5/IOUT/VBIAS

AIN6/IOUT/VBIAS/REFIN2(+)

AIN7/IOUT/VBIAS/REFIN2(–)

Figure 1.

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AD7124-4TRUZ-EP-R7 Datasheet(PDF) 1 Page - Analog Devices

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