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PIC18F1230-E/ML Datasheet(PDF) 70 Page - Microchip Technology

Part # PIC18F1230-E/ML
Description  18/20/28-Pin, Enhanced Flash Microcontrollers with nanoWatt Technology, High-Performance PWM and A/D
PDF  312 Pages
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Manufacturer  MICROCHIP [Microchip Technology]
Direct Link  http://www.microchip.com
Logo MICROCHIP - Microchip Technology

PIC18F1230-E/ML Datasheet(HTML) 70 Page - Microchip Technology

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PIC18F1230/1330
DS39758B-page 68
Advance Information
© 2006 Microchip Technology Inc.
6.2.2
TABLAT – TABLE LATCH REGISTER
The Table Latch (TABLAT) is an 8-bit register mapped
into the SFR space. The Table Latch register is used to
hold 8-bit data during data transfers between program
memory and data RAM.
6.2.3
TBLPTR – TABLE POINTER
REGISTER
The Table Pointer (TBLPTR) register addresses a byte
within the program memory. The TBLPTR is comprised
of three SFR registers: Table Pointer Upper Byte, Table
Pointer High Byte and Table Pointer Low Byte
(TBLPTRU:TBLPTRH:TBLPTRL).
These
three
registers join to form a 22-bit wide pointer. The low-
order 21 bits allow the device to address up to 2 Mbytes
of program memory space. The 22nd bit allows access
to the device ID, the user ID and the Configuration bits.
The Table Pointer register, TBLPTR, is used by the
TBLRD
and TBLWT instructions. These instructions can
update the TBLPTR in one of four ways based on the
table operation. These operations are shown in
Table 6-1. These operations on the TBLPTR only affect
the low-order 21 bits.
6.2.4
TABLE POINTER BOUNDARIES
TBLPTR is used in reads, writes and erases of the
Flash program memory.
When a TBLRD is executed, all 22 bits of the TBLPTR
determine which byte is read from program memory
into TABLAT.
When a TBLWT is executed, the three LSbs of the Table
Pointer register (TBLPTR<2:0>) determine which of the
8 program memory holding registers is written to. When
the timed write to program memory begins (via the WR
bit), the 19 MSbs of the TBLPTR (TBLPTR<21:3>)
determine which program memory block of 8 bytes is
written to. For more detail, see Section 6.5 “Writing to
Flash Program Memory”.
When an erase of program memory is executed, the
16 MSbs of the Table Pointer register (TBLPTR<21:6>)
point to the 64-byte block that will be erased. The Least
Significant bits (TBLPTR<5:0>) are ignored.
Figure 6-3 describes the relevant boundaries of
TBLPTR based on Flash program memory operations.
TABLE 6-1:
TABLE POINTER OPERATIONS WITH TBLRD AND TBLWT INSTRUCTIONS
FIGURE 6-3:
TABLE POINTER BOUNDARIES BASED ON OPERATION
Example
Operation on Table Pointer
TBLRD*
TBLWT*
TBLPTR is not modified
TBLRD*+
TBLWT*+
TBLPTR is incremented after the read/write
TBLRD*-
TBLWT*-
TBLPTR is decremented after the read/write
TBLRD+*
TBLWT+*
TBLPTR is incremented before the read/write
21
16
15
87
0
TABLE ERASE/WRITE
TABLE WRITE
TABLE READ – TBLPTR<21:0>
TBLPTRL
TBLPTRH
TBLPTRU
TBLPTR<5:0>
TBLPTR<21:6>



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