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PIC18F1230-E/ML Datasheet(PDF) 85 Page - Microchip Technology |
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PIC18F1230-E/ML Datasheet(HTML) 85 Page - Microchip Technology |
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85 / 312 page  PIC18F1230/1330 © 2006 Microchip Technology Inc. Advance Information DS39758B-page 83 TABLE 9-2: SUMMARY OF REGISTERS ASSOCIATED WITH PORTA Name Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 Reset Values on page PORTA RA7(1) RA6(1) RA5 RA4 RA3 RA2 RA1 RA0 44 LATA LATA7(1) LATA6(1) PORTA Data Latch Register (Read and Write to Data Latch) 43 TRISA TRISA7(1) TRISA6(1) PORTA Data Direction Control Register 43 INTCON GIE/GIEH PEIE/GIEL TMR0IE INT0IE RBIE TMR0IF INT0IF RBIF 41 INTCON2 RBPU INTEDG0 INTEDG1 INTEDG2 INTEDG3 TMR0IP INT3IP RBIP 41 ADCON1 — — — VCFG0 PCFG3 PCFG2 PCFG1 PCFG0 42 CMCON C2OUT C1OUT C0OUT — — CMEN2 CMEN1 CMEN0 42 CVRCON CVREN — CVRR CVRSS CVR3 CVR2 CVR1 CVR0 42 Legend: — = unimplemented, read as ‘0’. Shaded cells are not used by PORTA. Note 1: RA7:RA6 and their associated latch and data direction bits are enabled as I/O pins based on oscillator configuration; otherwise, they are read as ‘0’. |
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