GD25Q41ASIGT datasheet(11/51 Pages) GIGADEVICE

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Uniform Sector

Dual and Quad Serial Flash

GD25Q21B

6. STATUS REGISTER

S15

S14

S13

S12

S11

S10

SUS

CMP

LB3

LB2

LB1

HPF

SRP1

SRP0

BP4

BP3

BP2

BP1

BP0

WEL

WIP

The status and control bits of the Status Register are as follows:

WIP bit.

The Write In Progress (WIP) bit indicates whether the memory is busy in program/erase/write status register progress.

When WIP bit sets to 1, means the device is busy in program/erase/write status register progress, when WIP bit sets 0,

means the device is not in program/erase/write status register progress.

WEL bit.

The Write Enable Latch (WEL) bit indicates the status of the internal Write Enable Latch. When set to 1 the internal

Write Enable Latch is set, when set to 0 the internal Write Enable Latch is reset and no Write Status Register, Program or

Erase command is accepted.

BP4, BP3, BP2, BP1, BP0 bits.

The Block Protect (BP4, BP3, BP2, BP1, BP0) bits are non-volatile (Default Value is 0). They define the size of the

area to be software protected against Program and Erase commands. These bits are written with the Write Status Register

(WRSR) command. When the Block Protect (BP4, BP3, BP2, BP1, BP0) bits are set to 1, the relevant memory area (as

defined in Table1).becomes protected against Page Program (PP), Sector Erase (SE) and Block Erase (BE) commands.

The Block Protect (BP4, BP3, BP2, BP1, BP0) bits can be written provided that the Hardware Protected mode has not

been set. The Chip Erase (CE) command is executed, if the Block Protect (BP4, BP3, BP2, BP1, BP0) bits are set to

“None

protected

”.

SRP1, SRP0 bits.

The Status Register Protect (SRP1 and SRP0) bits are non-volatile Read/Write bits in the status register. The SRP

bits control the method of write protection: software protection, hardware protection, power supply lock-down or one time

programmable protection.

SRP1

SRP0

#WP

Status Register

Description

Software Protected

WP# pin has no control. The Status Register can be written to

after a Write Enable command, WEL=1.(Default)

Hardware Protected

When WP# pin is low the Status Register locked and can not

be written to.

Hardware Unprotected

When WP# pin is high the Status Register is unlocked and

can be written to after a Write Enable command, WEL=1.

Power Supply Lock-Down(1)

Status Register is protected and can not be written to again

until the next Power-Down, Power-Up cycle.

One Time Program(2)

Status Register is permanently protected and can not be

written to.

NOTE:

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