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1ST040EH2F35I3VLS1 Datasheet(PDF) 4 Page - Intel Corporation |
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1ST040EH2F35I3VLS1 Datasheet(HTML) 4 Page - Intel Corporation |
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4 / 39 page ![]() • Hard memory controllers and PHY supporting DDR4 rates up to 2666 Mbps per pin • Hard fixed-point and IEEE 754 compliant hard floating-point variable precision digital signal processing (DSP) blocks with over 9 TFLOP compute performance with a power efficiency of 80 GFLOP per Watt • Quad-core 64 bit Arm Cortex-A53 embedded processor in select devices, running up to 1.5 GHz • Programmable clock tree synthesis for flexible, low power, low skew clock trees • Dedicated secure device manager (SDM) for: — Enhanced device configuration and security — AES-256, SHA-256/384 and ECDSA-256/384 encrypt/decrypt accelerators and authentication — Multi-factor authentication — Physically Unclonable Function (PUF) service and software programmable device configuration capability • Advanced power saving features delivering up to 70% lower core power compared to previous generation high-performance FPGAs With these capabilities, Intel Stratix 10 TX devices are ideally suited for the highest transceiver bandwidth applications in diverse markets such as: • Compute and Storage—for custom servers, cloud computing and datacenter acceleration • Networking—for Terabit, 400G and multi-100G bridging, aggregation, packet processing and traffic management • Optical Transport Networks—for OTU4, 2xOTU4, 4xOTU4 • Broadcast—for high-end studio distribution, headend encoding/decoding, edge QAM • Military—for radar, electronic warfare, and secure communications • Medical—for diagnostic scanners and diagnostic imaging • Test and Measurement—for protocol analyzers and application testers • Wireless—for next-generation 5G networks 1.1. Intel Stratix 10 TX Devices In addition to delivering over 8 Tbps of transceiver bandwidth in a single package, Intel Stratix 10 TX devices offer up to 1 GHz core fabric performance and contain up to 2.8 million LEs in a monolithic fabric. They also feature up to 144 general purpose transceivers on separate transceiver tiles, and 2666 Mbps DDR4 external memory interface performance. The dual mode transceivers are capable of data rates up to 57.8 Gbps PAM4 / 28.9 Gbps NRZ for both short reach and backplane driving applications. Select devices contain an embedded hard processor system (HPS) based on an application-class quad-core 64 bit Arm Cortex-A53, running at clock rates up to 1.5 GHz. These devices are optimized for FPGA applications that require the highest transceiver bandwidth, and the highest core fabric performance, with the power efficiency of Intel’s 14 nm tri-gate process technology. 1. Intel® Stratix® 10 TX Device Overview 683717 | 2022.08.18 Intel® Stratix® 10 TX Device Overview Send Feedback 4 |
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