MCT8317A datasheet(62/161 Pages) TI1

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8.3.19.10 Over Temperature Shutdown (OTS)

If the die temperature exceeds the thermal shutdown limit (TOTS), all the FETs are disabled and the nFAULT

pin is driven low. In addition, the DRIVER_FAULT and OTS bits in the GATE_DRIVER_FAULT_STATUS register

are set to 1b. Normal operation resumes (driver operation and the nFAULT pin is released) when the die

temperature decreases below the hysteresis point of the over temperature shutdown limit (TOTS - TOTS_HYS). The

OTS bit stays latched high indicating that a thermal event occurred until a clear fault command is issued through

the CLR_FLT bit. This protection feature cannot be disabled.

8.3.19.11 Motor Lock (MTR_LCK)

The MCT8317A continuously checks for different motor lock conditions (see Motor Lock Detection) during motor

operation. When one of the enabled lock condition happens, a MTR_LCK event is recognized and action is

taken according to the MTR_LCK_MODE.

In MCT8317A, all locks can be enabled or disabled individually and retry times can be configured through

LCK_RETRY . MTR_LCK_MODE bit can operate in four different modes: MTR_LCK latched shutdown,

MTR_LCK automatic retry, MTR_LCK report only and MTR_LCK disabled.

8.3.19.11.1 MTR_LCK Latched Shutdown (MTR_LCK_MODE = 00xxb)

When a MTR_LCK event happens in this mode, the status of MOSFETs will be configured by MTR_LCK_MODE

and nFAULT is driven low. Status of MOSFETs during MTR_LCK:

• MTR_LCK_MODE = 0000b: All MOSFETs are turned OFF.

• MTR_LCK_MODE = 0001b: MOSFET which was switching is turned OFF while the one which was

conducting stays ON till inductive energy is completely recirculated.

• MTR_LCK_MODE = 0010b: All high-side MOSFETs are turned ON.

• MTR_LCK_MODE = 0011b: All low-side MOSFETs are turned ON.

The CONTROLLER_FAULT, MTR_LCK and respective motor lock condition bits are set to 1b in the fault status

registers. Normal operation resumes (gate driver operation and the nFAULT pin is released) when the MTR_LCK

condition clears and a clear fault command is issued through the CLR_FLT bit.

8.3.19.11.2 MTR_LCK Automatic Recovery (MTR_LCK_MODE= 01xxb)

When a MTR_LCK event happens in this mode, the status of MOSFETs will be configured by MTR_LCK_MODE

and nFAULT is driven low. Status of MOSFETs during MTR_LCK:

• MTR_LCK_MODE = 0100b: All MOSFETs are turned OFF.

• MTR_LCK_MODE = 0101b: MOSFET which was switching is turned OFF while the one which was

conducting stays ON till inductive energy is completely recirculated.

• MTR_LCK_MODE = 0110b: All high-side MOSFETs are turned ON.

• MTR_LCK_MODE = 0111b: All low-side MOSFETs are turned ON.

The CONTROLLER_FAULT, MTR_LCK and respective motor lock condition bits are set to 1b in the fault status

registers. Normal operation resumes automatically (gate driver operation and the nFAULT pin is released) after

the tLCK_RETRY (configured by LCK_RETRY) time lapses. The CONTROLLER_FAULT, MTR_LCK and respective

motor lock condition bits are reset to 0b after the tLCK_RETRY period expires.

8.3.19.11.3 MTR_LCK Report Only (MTR_LCK_MODE = 1000b)

No protective action is taken when a MTR_LCK event happens in this mode. The motor lock event is reported

by setting the CONTROLLER_FAULT, MTR_LCK and respective motor lock condition bits to 1b in the fault

status registers. The gate drivers continue to operate. The external controller manages this condition by acting

appropriately. The reporting clears when the MTR_LCK condition clears and a clear fault command is issued

through the CLR_FLT bit.

8.3.19.11.4 MTR_LCK Disabled (MTR_LCK_MODE = 1xx1b)

No action is taken when a MTR_LCK event happens in this mode.

MCT8317A

SLLSFQ2 – JANUARY 2023

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