DFE252012P-2R2M datasheet(30/44 Pages) MICROCHIP

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MCP16501

DS20006388A-page 30

 2020 Microchip Technology Inc.

5.2

Buck1 Hysteretic Control Mode

(HCM)/B1HCEN-MCP16501E only

If Buck1 is set in Auto-PFM mode while the input

voltage (e.g., a discharging battery) is decreasing and

eventually pushing Buck1 to 100% duty cycle (Bypass

mode), the operational no-load quiescent current

shows some increase due to the augmented switching

activity of Buck1.

This is intrinsic to the Auto-PFM architecture. The

peaking in the quiescent current is in the 1 mA range,

and it may or may not be detrimental to the overall

system efficiency and/or battery life, depending mostly

on the minimum loading of Buck1.

If the increase in quiescent current when approaching

Bypass mode on Buck1 is an important factor for the

application, the user can choose MCP16501E which

features a different mode of light load, high-efficiency

operation (called Hysteretic Control mode, HCM),

where the output voltage is controlled in a hysteretic

fashion between the nominal output voltage and 2.9%

of it. This control method significantly reduces the aver-

age switching activity of Buck1, especially in the prox-

imity of the bypass operation, at the expense of an

increase of the output ripple amplitude.

The user should therefore carefully evaluate the need

for Hysteretic Control Mode and balance the increase

in output ripple against the real benefit achieved in pro-

longing battery life. If the minimum loading on Buck1 is

always significantly higher than 1 mA, HCM is typically

not needed.

The relevant EC Table parameter that defines the

upper voltage regulation threshold (typically +2.9% of

the nominal output voltage) is the Hysteretic Control

Mode Upper Regulation Threshold.

HCM mode will only be activated when the input-to-out-

put voltage differential decreases below a certain

value. This is done to prevent fast inductor charging,

which in turn may cause a poorer control of the effec-

tive upper regulation voltage.

The relevant “Electrical Characteristics” table

parameter that defines the input voltage threshold (fall-

ing input voltage), below which HCM is enabled, is the

Hysteretic Control Mode Enable Threshold and it is

also expressed as a percentage of the nominal output

voltage value (typically, +9%).

5.3

LPDDR2 Support with Hibernate

Mode-MCP16501D Only

To support LPDDR2 applications, which require two

power supplies, the LDO block is used for the genera-

tion of the 1.8V of LPDDR2.

In the case of the MCP16501D the LDO is partially

included in the internal States machine such that the

LDO stays on during Hibernate mode.

The LDO LEN pin must be connected to rail VOUT1

(VDDIO) such that the LDO (1.8V for LPDDR2) will

immediately turn on after the VDDIO rail and before

Buck2 (1.2V for LPDDR2), according to the LPDDR2

power-up specifications.

In this particular application the SELV2 will be con-

nected to GND in order to have VOUT2 regulated to 1.2V

for VDD2/VDDCA/VDDQ of LPDDR2, while the LDO

feedback resistors (R3 and R4) will be selected to be

equal, so that the LDO output is regulated to 1.8V for

the LPDDR2 VDD1 rail.

The “Typical Application Circuit” section highlights

this specific use case.

In the particular case of the MCP16501D, HCPEN is

disabled, such that any short circuit event on one of the

channels will trigger a turn off of all the channels and a

startup procedure. This method ensures proper

re-sequencing of the LPDDR2 supply rails, regardless

of the particular channel being affected by short-circuit.

5.4

Protections

The MCP16501 offers the following:

• Thermal Shutdown

• Overcurrent Protection

Thermal Shutdown protection will immediately termi-

nate power delivery on all channels when the die

temperature exceeds the upper Thermal Shutdown

threshold. At the same time, nRSTO will be asserted

low.

After the die temperature has decreased below the

lower Thermal Shutdown threshold (hysteresis = 20°C)

and an additional 100 ms delay, the MCP16501 will

automatically attempt a new start-up sequence without

the need of an external Start condition (from nSTRT or

PWRLHD).

5.4.1

OVERCURRENT PROTECTION

(BUCK CHANNELS)

The overcurrent protection consists of a cycle-by-cycle,

high-side current limit with digital filtering, followed by

the Hiccup mode for protection against short-circuit

conditions.

The cycle-by-cycle, high-side current limit includes

frequency foldback. Because of Leading-Edge Blank-

ing (LEB) in Peak Current mode control, frequency

foldback (with a factor = 4) is used to allow more time

for inductor discharge and prevent current runaway in

a deep overload condition.

Frequency foldback operation is entered when:

A high-side current limit event has been

detected; and

The feedback voltage is less than 500 mV

(typical).

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