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DS20006388A-page 33

MCP16501

5.4.2

PWM MODE NEGATIVE CURRENT

LIMIT PROTECTION (BUCK

CHANNELS)

The Buck channels of the MCP16501 also feature a

negative inductor current limit protection when operat-

ing in Forced PWM mode. This prevents dangerous

current levels in the power train. If the inductor current

reaches the low-side Negative Peak Current Limit

(ILIM_NEGx) while the low-side MOSFET is conducting,

the low-side MOSFET is turned off and the inductor

current is pushed to the input voltage, either through

the body diode of the high-side MOSFET (if off) or its

channel (when turned on by the control loop). The

intervention of this protection does not cause the asser-

tion of the nRSTO (Reset) signal.

This protection should never be exercised continuously

and/or without a large input bulk capacitor, because it

may quickly destroy the device.

When this protection is engaged, energy is pumped

back from the output into the input voltage. If the input

supply has no sinking capability and/or the input bulk

decoupling cap is not large enough, the input voltage

will rise to the point where the device is permanently

damaged.

5.4.3

LDO CURRENT LIMIT PROTECTION

The LDO is protected against short circuit by a linear

constant-voltage/constant-current (i.e., brick wall) output

characteristic. The output current under short-circuit

conditions is not intermittent. Therefore, the internal

power dissipation in the MCP16501 can reach high

levels under LDO short-circuit conditions. The interven-

tion of the LDO current limit protection by itself does not

cause the assertion of the nRSTO (Reset) signal.

5.5

Maximum Simultaneous

Capacitive and DC Loading in

Soft Start

The Current-mode architecture of the Buck channels in

the MCP16501 make them tolerant to additional

capacitive loads from the stability point of view.

However, since the Hiccup mode overcurrent protection

is also enabled during soft start, the user needs to be

aware that additional load capacitance, distributed on

the application board, may cause the intervention of the

Hiccup mode protections under dynamic conditions (ris-

ing output voltage).

This is especially important for Buck1 since the I/O rail

(typically 3.3V) can be used for a wide variety of loads and

its total distributed capacitive load could significantly

exceed the minimum recommended nominal capacitance

value (i.e., 22 µF).

Using the symbols listed in the “AC/DC Characteristics”

table, Equation 5-1 establishes the maximum allowable

capacitive load, Cadd_max, to prevent the cycle-by-cycle

current limit from being engaged.

Complying with this condition will ensure that Hiccup

mode overcurrent protection will not be activated

during the soft start ramp.

Failing to comply with the condition formulated below

does not necessarily mean that Hiccup mode

protection will be engaged. The digital filtering provided

in the Hiccup mode overcurrent algorithm, as described

in Section 5.4.1 “Overcurrent Protection (Buck

Channels)”, provides immunity to single, and even

multiple cycle-by-cycle current limit events and allows

operation in proximity of the high-side current limit for a

significant amount of time during the soft start.

EQUATION 5-1:

As a consequence, the maximum value of additional

capacitance, Cadd_max, that can be observed by

experiments is significantly higher than the limit

calculated with the aforementioned formula.

Cadd_max

ILIM_HS

-------------------- I

OUT

–





SSR

---------- C

OUT

–

⋅

Where:

ILIM_HS = High-Side MOSFET Current Limit

r = Ratio of the peak inductor current,

ILpk, to average inductor current at

the point where ILpk =ILIM_HS. For

simplicity, assume r = 1 since the

peak-to-peak inductor current ripple

will be small in comparison to the

average inductor current value when

the high-side current limit is engaged.

IOUT = Output Current of the Buck Converter

SSR = Soft Start Rate

COUT = Output capacitance already present

on the Buck converter output

(typically, COUT =22 µF)

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