HC805P18GRSSLASHD datasheet(82/111 Pages) NXP

82 / 111 page

GENERAL RELEASE SPECIFICATION

INSTRUCTION SET

MC68HC805P18

12-2

12.2.3 Direct

Direct instructions can access any of the first 256 memory addresses with two

bytes. The first byte is the opcode, and the second is the low byte of the operand

address. In direct addressing, the CPU automatically uses $00 as the high byte of

the operand address. BRSET and BRCLR are 3-byte instructions that use direct

addressing to access the operand and relative addressing to specify a branch

destination.

12.2.4 Extended

Extended instructions use only three bytes to access any address in memory. The

first byte is the opcode; the second and third bytes are the high and low bytes of

the operand address.

When using the Motorola assembler, the programmer does not need to specify

whether an instruction is direct or extended. The assembler automatically selects

the shortest form of the instruction.

12.2.5 Indexed, No Offset

Indexed instructions with no offset are 1-byte instructions that can access data with

variable addresses within the first 256 memory locations. The index register

contains the low byte of the conditional address of the operand. The CPU

automatically uses $00 as the high byte, so these instructions can address

locations $0000–$00FF.

Indexed, no offset instructions are often used to move a pointer through a table or

to hold the address of a frequently used RAM or I/O location.

12.2.6 Indexed, 8-Bit Offset

Indexed, 8-bit offset instructions are 2-byte instructions that can access data with

variable addresses within the first 511 memory locations. The CPU adds the

unsigned byte in the index register to the unsigned byte following the opcode. The

sum is the conditional address of the operand. These instructions can access

locations $0000–$01FE.

Indexed 8-bit offset instructions are useful for selecting the kth element in an

n-element table. The table can begin anywhere within the first 256 memory

locations and could extend as far as location 510 ($01FE). The k value is typically

in the index register, and the address of the beginning of the table is in the byte

following the opcode.

Freescale Semiconductor, Inc.

For More Information On This Product,

Go to: www.freescale.com

HC805P18GRS/D Datasheet(PDF) 82 Page - NXP Semiconductors