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HC805P18GRS/D Datasheet(PDF) 92 Page - NXP Semiconductors |
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HC805P18GRS/D Datasheet(HTML) 92 Page - NXP Semiconductors |
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92 / 111 page  GENERAL RELEASE SPECIFICATION INSTRUCTION SET MC68HC805P18 12-12 NEG opr NEGA NEGX NEG opr,X NEG ,X Negate Byte (Two’s Complement) M ← –(M) = $00 – (M) A ← –(A) = $00 – (A) X ← –(X) = $00 – (X) M ← –(M) = $00 – (M) M ← –(M) = $00 – (M) —— ¤¤¤ DIR INH INH IX1 IX 30 40 50 60 70 ii ff 5 3 3 6 5 NOP No Operation ————— INH 9D 2 ORA # opr ORA opr ORA opr ORA opr,X ORA opr,X ORA ,X Logical OR Accumulator with Memory A ← (A) ∨ (M) — — ¤¤ — IMM DIR EXT IX2 IX1 IX AA BA CA DA EA FA ii dd hh ll ee ff ff 2 3 4 5 4 3 ROL opr ROLA ROLX ROL opr,X ROL ,X Rotate Byte Left through Carry Bit —— ¤¤¤ DIR INH INH IX1 IX 39 49 59 69 79 dd ff 5 3 3 6 5 ROR opr RORA RORX ROR opr,X ROR ,X Rotate Byte Right through Carry Bit —— ¤¤¤ DIR INH INH IX1 IX 36 46 56 66 76 dd ff 5 3 3 6 5 RSP Reset Stack Pointer SP ← $00FF ————— INH 9C 2 RTI Return from Interrupt SP ← (SP) + 1; Pull (CCR) SP ← (SP) + 1; Pull (A) SP ← (SP) + 1; Pull (X) SP ← (SP) + 1; Pull (PCH) SP ← (SP) + 1; Pull (PCL) ¤¤¤¤¤ INH 80 6 RTS Return from Subroutine SP ← (SP) + 1; Pull (PCH) SP ← (SP) + 1; Pull (PCL) INH SBC # opr SBC opr SBC opr SBC opr,X SBC opr,X SBC ,X Subtract Memory Byte and Carry Bit from Accumulator A ← (A) – (M) – (C) — — ¤¤¤ IMM DIR EXT IX2 IX1 IX A2 B2 C2 D2 E2 F2 ii dd hh ll ee ff ff 2 3 4 5 4 3 SEC Set Carry Bit C ← 1 ———— 1 INH 99 2 SEI Set Interrupt Mask I ← 1 — 1 — — — INH 9B 2 STA opr STA opr STA opr,X STA opr,X STA ,X Store Accumulator in Memory M ← (A) — — ¤¤ — DIR EXT IX2 IX1 IX B7 C7 D7 E7 F7 dd hh ll ee ff ff 4 5 6 5 4 STOP Stop Oscillator and Enable IRQ Pin — 0 — — — INH 8E 2 Table 12-6. Instruction Set Summary (Continued) Source Form Operation Description Effect on CCR HIN Z C C b0 b7 b0 b7 C Freescale Semiconductor, Inc. For More Information On This Product, Go to: www.freescale.com |
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