ST25R3920B datasheet(27/158 Pages) STMICROELECTRONICS

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DS13890 Rev 4

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ST25R3920B

Application information

157

Squelch

This feature is designed for operation in noisy environments. The noise may be

misinterpreted as the start of tag response, resulting in decoding errors.

Automatic squelch is enabled by option bit sqm_dyn in the Receiver configuration register 2.

It is activated automatically 18.88 µs after end of TX and is terminated at the moment the

Mask receive timer (MRT) reaches the value defined in the Squelch timer register. This

mode is primarily intended to suppress noise generated by tag processing during the time

when the tag response is not expected (covered by MRT).

Squelch can operate in two modes, namely with ratios 1 and 6, selectable by pulz_61 bit in

the Receiver configuration register 2.

Squelch ratio 1 means that system observes the subcarrier signal from the main digitizer

and decrease the system gain to decrease the frequency of transitions. If there are more

than two transitions on this output in a 50 μs time period, gain is reduced by 3 dB and output

is observed during the following 50 μs. This procedure is repeated until number of

transitions in 50 μs is lower or equal to 2 or until the maximum gain reduction is reached.

This mode is intended for protocols where digitized subcarrier outputs are used.

Squelch ratio 6 means the system similarly observes and decreases the frequency seen at

the window comparator set to 6 times the digitizing window. This mode is intended for

protocols where output from correlators are used (ISO-A, ISO-B correlated reception).

The gain setting acquired by squelch is cleared by sending direct command Reset RX gain.

AGC

The AGC (automatic gain control) reduces the gain to keep the receiver chain and input to

the digitizing stage out of saturation. The demodulation process is also less influenced by

system noise when the gain is properly adjusted.

The AGC logic starts operating when the signal rx_on is asserted to high and is reset when

it is reset to low. The state of the receiver gain is stored in the Gain reduction state register

during a high to low transition of bit rx_on. Reading this register later on gives information of

the gain setting used during the last reception.

The AGC system comprises a window comparator and an AGC ratio that can be set to 3 or

to 6. As an example, when the AGC ratio is set to 6 the window is six times larger than the

data digitalization window comparator. When the AGC function is enabled the gain is

reduced until there are no transitions on its output. Such procedure assures that the input to

digitalization window comparator is up to 6 times larger than its window.

If the AGC ratio is set to three, the input to the digitalization window comparator is set to be

up to 3 times larger than its window.

The AGC operation is controlled by the control bits agc_en, agc_m, agc_alg, and agc6_3 in

Receiver configuration register 2.

The bit agc_m defines the AGC mode when two AGC modes are available. The AGC can

operate during the complete RX process as long as the signal rx_on is high and it can be

enabled only during first eight subcarrier pulses.

There are two AGC algorithms to choose from bit agc_alg. The AGC can start either by

pre-setting (maximum digitizer window and maximum gain) or by resetting (minimum

digitizer window and maximum gain) it. The algorithm with preset is faster and therefore

recommended for protocols with short SOF (like ISO14443A at 106 kbps).

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