ISL8200AMM

FN8287 Rev 2.00

Page 9 of 24

June 3, 2015

OVER-TEMPERATURE PROTECTION CONTROLLER JUNCTION TEMPERATURE

Over-Temperature Trip

150

°C

Over-Temperature Release Threshold

125

°C

INTERNAL COMPONENT VALUES

Internal Resistor Between PVCC and

VCC pin

RCC

5

Ω

Internal Resistor Between PHASE and

OCSET Pins

RISEN-IN

2.2

kΩ

Internal Resistor Between FSYNC_IN

and PGND1 Pins

RFS

59

kΩ

Internal Resistor Between PGOOD and

VCC Pins

RPG

10

kΩ

Internal Resistor Between CLKOUT and

VCC Pins

RCLK

10

kΩ

Internal Resistor Between PH_CNTRL

and VCC Pins

RPHC

10

kΩ

Internal Resistor Between VOUT_SET

and VSEN_REM- pin

ROS1

2.2

kΩ

NOTES:

5. Parameters with TYP limits are not production tested, unless otherwise specified.

6. Parameters with MIN and/or MAX limits are 100% tested for internal IC prior to module assembly, unless otherwise specified. Temperature limits

established by characterization and are not production tested.

7. Refer to Defense Logistics Agency (DLA) drawing number V62/10608-02XB for min/max parameters.

Electrical Specifications Boldface limits apply across the operating temperature range, -55°C to +125°C. (Continued)

PARAMETER

SYMBOL

TEST CONDITIONS

MIN

(Note 6)

TYP

(Note 5)

MAX

(Note 6)

UNIT

ISFETDRV

ISHARE_BUS

CLKOUT

FSYNC_IN

EN

FF

VIN

PVIN

VOUT

VOUT_SET

VSEN_REM-

PGOOD

PH_CNTRL

VCC

ISL8200AMMREP

VOUT

ISFETDRV1

RSET

C9

VCC

PVIN

GROUND

VOUT

GROUND

2.2k

47µF (x8)

C205

10nF

FIGURE 5. TEST CIRCUIT FOR ALL PERFORMANCE AND DERATING GRAPHS

VOUT = 1.2V for RSET = 2.2k

Refer to Table 1 for RSET vs VOUT