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PIC18F6410E/PTSQTP Datasheet(PDF) 140 Page - Microchip Technology |
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PIC18F6410E/PTSQTP Datasheet(HTML) 140 Page - Microchip Technology |
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140 / 404 page ![]() PIC18F6310/6410/8310/8410 DS39635A-page 138 Preliminary 2004 Microchip Technology Inc. 10.9 PORTJ, TRISJ and LATJ Registers PORTJ is an 8-bit wide, bidirectional port. The corre- sponding data direction register is TRISJ. Setting a TRISJ bit (= 1) will make the corresponding PORTJ pin an input (i.e., put the corresponding output driver in a high-impedance mode). Clearing a TRISJ bit (= 0) will make the corresponding PORTJ pin an output (i.e., put the contents of the output latch on the selected pin). The Data Latch register (LATJ) is also memory mapped. Read-modify-write operations on the LATJ register, read and write the latched output value for PORTJ. All pins on PORTJ are implemented with Schmitt Trigger input buffers. Each pin is individually configurable as an input or output. When the external memory interface is enabled, all of the PORTJ pins function as control outputs for the interface. This occurs automatically when the interface is enabled by clearing the EBDIS control bit (MEMCON<7>). The TRISJ bits are also overridden. EXAMPLE 10-9: INITIALIZING PORTJ Note: PORTJ is available only on PIC18F8310/8410 devices. Note: On a Power-on Reset, these pins are configured as digital inputs. CLRF PORTJ ; Initialize PORTG by ; clearing output ; data latches CLRF LATJ ; Alternate method ; to clear output ; data latches MOVLW 0xCF ; Value used to ; initialize data ; direction MOVWF TRISJ ; Set RJ3:RJ0 as inputs ; RJ5:RJ4 as output ; RJ7:RJ6 as inputs |
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