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PIC18F6410E/PTSQTP Datasheet(PDF) 138 Page - Microchip Technology |
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PIC18F6410E/PTSQTP Datasheet(HTML) 138 Page - Microchip Technology |
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138 / 404 page ![]() PIC18F6310/6410/8310/8410 DS39635A-page 136 Preliminary 2004 Microchip Technology Inc. 10.8 PORTH, LATH and TRISH Registers PORTH is an 8-bit wide, bidirectional I/O port. The cor- responding data direction register is TRISH. Setting a TRISH bit (= 1) will make the corresponding PORTH pin an input (i.e., put the corresponding output driver in a high-impedance mode). Clearing a TRISH bit (= 0) will make the corresponding PORTH pin an output (i.e., put the contents of the output latch on the selected pin). The Data Latch register (LATH) is also memory mapped. Read-modify-write operations on the LATH register, read and write the latched output value for PORTH. All pins on PORTH are implemented with Schmitt Trigger input buffers. Each pin is individually configurable as an input or output. When the external memory interface is enabled, four of the PORTH pins function as the high-order address lines for the interface. The address output from the interface takes priority over other digital I/O. The corresponding TRISH bits are also overridden. EXAMPLE 10-8: INITIALIZING PORTH Note: PORTH is available only on PIC18F8310/8410 devices. Note: On a Power-on Reset, these pins are configured as digital inputs. CLRF PORTH ; Initialize PORTH by ; clearing output ; data latches CLRF LATH ; Alternate method ; to clear output ; data latches MOVLW 0CFh ; Value used to ; initialize data ; direction MOVWF TRISH ; Set RH3:RH0 as inputs ; RH5:RH4 as outputs ; RH7:RH6 as inputs |
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