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PIC18F6410E/PTSQTP Datasheet(PDF) 135 Page - Microchip Technology |
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PIC18F6410E/PTSQTP Datasheet(HTML) 135 Page - Microchip Technology |
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135 / 404 page  2004 Microchip Technology Inc. Preliminary DS39635A-page 133 PIC18F6310/6410/8310/8410 TABLE 10-11: PORTF FUNCTIONS TABLE 10-12: SUMMARY OF REGISTERS ASSOCIATED WITH PORTF Pin Name Function TRIS Setting I/O I/O Type Description RF0/AN5 RF0 0 O DIG LATF<0> data output; not affected by analog input. 1 I ST PORTF<0> data input; disabled when analog input enabled. AN5 1 I ANA A/D input channel 5. Default configuration on POR. RF1/AN6/C2OUT RF1 0 O DIG LATF<1> data output; not affected by analog input. 1 I ST PORTF<1> data input; disabled when analog input enabled. AN6 1 I ANA A/D input channel 6. Default configuration on POR. C2OUT 0 O DIG Comparator 2 output; takes priority over port data. RF2/AN7/C1OUT RF2 0 O DIG LATF<2> data output; not affected by analog input. 1 I ST PORTF<2> data input; disabled when analog input enabled. AN7 1 I ANA A/D input channel 7. Default configuration on POR. C1OUT 0 O TTL Comparator 1 output; takes priority over port data. RF3/AN8 RF3 0 O DIG LATF<3> data output; not affected by analog input. 1 I ST PORTF<3> data input; disabled when analog input enabled. AN8 1 I ANA A/D input channel 8 and Comparator C2+ input. Default input configuration on POR; not affected by analog output. RF4/AN9 RF4 0 O DIG LATF<4> data output; not affected by analog input. 1 I ST PORTF<4> data input; disabled when analog input enabled. AN9 1 I ANA A/D input channel 9 and Comparator C2- input. Default input configuration on POR; does not affect digital output. RF5/AN10/CVREF RF5 0 O DIG LATF<5> data output; not affected by analog input. Disabled when CVREF output enabled. 1 I ST PORTF<5> data input; disabled when analog input enabled. Disabled when CVREF output enabled AN10 1 I ANA A/D input channel 10 and Comparator C1+ input. Default input configuration on POR. CVREF x O ANA Comparator voltage reference output. Enabling this feature disables digital I/O. RF6/AN11 RF6 0 O DIG LATF<6> data output; not affected by analog input. 1 I ST PORTF<6> data input; disabled when analog input enabled. AN11 1 I ANA A/D input channel 11 and Comparator C1- input. Default input configuration on POR; does not affect digital output. RF7/SS RF7 0 O DIG LATF<7> data output. 1 I ST PORTF<7> data input. SS 1 I TTL Slave select input for SSP (MSSP module). Legend: PWR = Power Supply, O = Output, I = Input, ANA = Analog Signal, DIG = Digital Output, ST = Schmitt Buffer Input, TTL = TTL Buffer Input, x = Don’t care (TRIS bit does not affect port direction or is overridden for this option). Name Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 Reset Values on Page TRISF PORTF Data Direction Control Register 60 PORTF Read PORTF pin/Write PORTF Data Latch 60 LATF Read PORTF Data Latch/Write PORTF Data Latch 60 ADCON1 — — VCFG1 VCFG0 PCFG3 PCFG2 PCFG1 PCFG0 58 CMCON C2OUT C1OUT C2INV C1INV CIS CM2 CM1 CM0 59 CVRCON CVREN CVROE CVRR CVRSS CVR3 CVR2 CVR1 CVR0 59 Legend: — = unimplemented, read as ‘0’. Shaded cells are not used by PORTF. |
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