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ADMFM2000ABVZ Datasheet(PDF) 25 Page - Analog Devices |
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ADMFM2000ABVZ Datasheet(HTML) 25 Page - Analog Devices |
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25 / 28 page ![]() Data Sheet ADMFM2000 APPLICATIONS INFORMATION analog.com Rev. 0 | 25 of 28 Table 9. Connection Descriptions (Continued) Functional Blocks Pin No. Mnemonic Description Basic Connection VDD_LO_DRIVER_2, VDD_LNA_2 voltage for Channel 2 LO driver, analog 5.0 V supply voltage for Channel 2 LNA. close as possible to the pins. −5 V Supply Voltage for DSA B18 VSS_DSAS Analog −5.0 V supply voltage for DSAs. Decouple this pin using 10 pF and 0.1 μF capacitors to ground. Locate the decoupling capacitors as close as possible to the pin. LNA Inputs D2, L2 RF_IN_1, RF_IN_2 Single-ended RF inputs for Channel 1 and Channel 2. Connect these pins to an RF input source with a typical input power of −20 dBm. LNA Outputs B6, M6 LNA_OUT_1, LNA_OUT_2 Single-ended RF outputs for Channel 1 and Channel 2. Connect these pins to signal analyzer. Mixer Inputs B10, M10 MIXER_IN_1, MIXER_IN_2 Single-ended mixer inputs for Channel 1 and Channel 2. Connect these pins to an RF input source with a typical input power of −10 dBm. LO Input H2 LO_IN Single-ended LO input for Channel 1 and Channel 2. Connect this pin to RF input source, typical input power 6 dBm. IF Inputs B12, M12 RF_BYPASS_IN_1, RF_BYPASS_IN_2 Single-ended IF inputs for Channel 1 and Channel 2. Connect these pins to an IF input source with a typical input power of −20 dBm. IF Outputs F18, L18 IF_OUT_1, IF_OUT_2 Single-ended IF outputs for Channel 1 and Channel 2. Connect these pins to signal analyzer. Amplifier Gain Control B2, K4, F4, G4 VGG_RFAMP_1, VGG_RFAMP_2, VGG_LOAMP_1, VGG_LOAMP_2 Optional gain control voltage, these pins are internally self-biased and must normally be left open. Set these pins to left open. Switch Control B15, B16, L14, K14 SW1_CTRL_A, SW1_CTRL_B, SW2_CTRL_A, SW2_CTRL_B Channel 1 Switch Control Input A, and Channel 1 Switch Control Input B, Channel 2 Switch Control Input A, and Channel 2 Switch Control Input B. These pins must always be kept at a valid logic level (Refer to Table 1). DSA Attenuation D15, D14, C14, C15, C16, M14, M15, M16, L15, L16 DSA1_Vx1, DSA2_Vx1 Channel 1 DSA attenuation control voltage, and Channel 2 DSA attenuation control voltage. These pins must always be kept at a valid logic level (Refer to Table 1) and not be left floating. Ground A5, A7, A9, A11, A13, B3, B5, B7, B8, B9, B11, B13, B14, B17, C1 to C13, C17, C18, D3 to D13, D16, D17, E1 to E3, E16 to E19, F2, F3, F6 to F14, F16, F17, G1 to G3, G6 to G14, G16 to G19, H3, H4, H6 to H14, H16 to H18, J1 to J4, J16, J17, K1 to K3, K5, K6, K8 to K13, K15 to K19, L3 to L13, L17, M1 to M3, M5, M7 to M9, M11, M13, M17 to M19, N5, N7, N9, N11, N13 GND Ground. Connect these balls to the ground of the PCB. 1 x = 0, 1, 2, 3, and 4 |
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