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PIC18F6X2X Datasheet(PDF) 159 Page - Microchip Technology |
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PIC18F6X2X Datasheet(HTML) 159 Page - Microchip Technology |
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159 / 386 page  2003 Microchip Technology Inc. Advance Information DS39612A-page 157 PIC18F6X2X/8X2X 16.4.3 SETUP FOR PWM OPERATION The following steps should be taken when configuring the CCP module for PWM operation: 1. Select TMR2 or TMR4 by setting or clearing the T3CCP2:T3CCP1 bits in T3CON register. 2. Set the PWM period by writing to the PR2 or PR4 register 3. Set the PWM duty cycle by writing to the CCPR4L register and CCP4CON<5:4> bits. 4. Make the CCP4 pin an output by clearing the TRISG<3> bit. 5. Set TMR2 or TMR4 prescale value, enable Timer2 or Timer4 by writing to T2CON or T4CON. 6. Configure the CCP4 module for PWM operation. TABLE 16-3: EXAMPLE PWM FREQUENCIES AND RESOLUTIONS AT 40 MHz TABLE 16-4: REGISTERS ASSOCIATED WITH PWM, TIMER2 AND TIMER4 PWM Frequency 2.44 kHz 9.77 kHz 39.06 kHz 156.25 kHz 312.50 kHz 416.67 kHz Timer Prescaler (1, 4, 16) 16 41111 PR2 Value FFh FFh FFh 3Fh 1Fh 17h Maximum Resolution (bits) 14 12 10 8 7 6.58 Name Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 Value on POR, BOR Value on all other RESETS INTCON GIE/GIEH PEIE/GIEL TMR0IE INT0IE RBIE TMR0IF INT0IF RBIF 0000 0000 0000 0000 RCON IPEN — — RI TO PD POR BOR 0--1 11qq 0--q qquu PIR1 PSPIF ADIF RCIF TXIF SSPIF CCP1IF TMR2IF TMR1IF 0000 0000 0000 0000 PIE1 PSPIE ADIE RCIE TXIE SSPIE CCP1IE TMR2IE TMR1IE 0000 0000 0000 0000 IPR1 PSPIP ADIP RCIP TXIP SSPIP CCP1IP TMR2IP TMR1IP 1111 1111 1111 1111 PIR2 — CMIE — EEIE BCLIF LVDIF TMR3IF CCP2IF -0-0 0000 ---0 0000 PIE2 — CMIF — EEIF BCLIE LVDIE TMR3IE CCP2IE -0-0 0000 ---0 0000 IPR2 — CMIP — EEIP BCLIP LVDIP TMR3IP CCP2IP -1-1 1111 ---1 1111 PIR3 — — RC2IF TX2IF TMR4IF CCP5IF CCP4IF CCP3IF --00 0000 --00 0000 PIE3 — — RC2IE TX2IE TMR4IE CCP5IE CCP4IE CCP3IE --00 0000 --00 0000 IPR3 — — RC2IP TX2IP TMR4IP CCP5IP CCP4IP CCP3IP --11 1111 --11 1111 TMR2 Timer2 Module Register 0000 0000 0000 0000 PR2 Timer2 Module Period Register 1111 1111 1111 1111 T2CON — T2OUTPS3 T2OUTPS2 T2OUTPS1 T2OUTPS0 TMR2ON T2CKPS1 T2CKPS0 -000 0000 -000 0000 T3CON RD16 T3CCP2 T3CKPS1 T3CKPS0 T3CCP1 T3SYNC TMR3CS TMR3ON 0000 0000 uuuu uuuu TMR4 Timer4 Register 0000 0000 uuuu uuuu PR4 Timer4 Period Register 1111 1111 uuuu uuuu T4CON — T4OUTPS3 T4OUTPS2 T4OUTPS1 T4OUTPS0 TMR4ON T4CKPS1 T4CKPS0 -000 0000 uuuu uuuu CCPRxL(1) Capture/Compare/PWM Register x (LSB) xxxx xxxx uuuu uuuu CCPRxH(1) Capture/Compare/PWM Register x (MSB) xxxx xxxx uuuu uuuu CCPxCON(1) — — DCxB1 DCxB0 CCPxM3 CCPxM2 CCPxM1 CCPxM0 --00 0000 --00 0000 Legend: x = unknown, u = unchanged, - = unimplemented, read as ‘0’. Shaded cells are not used by PWM,Timer2 or Timer4. Note 1: Generic term for all of the identical registers of this name for all CCP modules, where ‘x’ identifies the individual module (CCP4 and CCP5). Bit assignments and RESET values for all registers of the same generic name are identical. |
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