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TMP88CS38BFG Datasheet(PDF) 51 Page - Toshiba Semiconductor |
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TMP88CS38BFG Datasheet(HTML) 51 Page - Toshiba Semiconductor |
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51 / 218 page ![]() TMP88CS38B/CM38B/CP38B 2007-09-12 88CS38B-51 2.2.5 Port P6 (P67 to P60) Port P6 is an 8-bit input/output port which can be configured as an input or an output in one-bit unit under software control. Input/output mode is selected by the corresponding bit in the port P6 input/output control register (P6CR). Port P6 is configured as an input if its corresponding P6CR bit is cleared to “0”, and as an output if its corresponding P6CR bit is set to “1” and P6nS bit is set to “1”. P63 to P60 are sink open-drain ports. During reset, P6CR is initialized to “0”, which configures port P6 as an input. The P6 output latches are also initialized to “1”. Data is written into the output latch regardless of the P6CR contents. Therefore initial output data should be written into the output latch before setting P6CR. Port P6 is used as an on screen display (OSD) output (R, G, B and Y/BL signal)/input (RIN, GIN BIN, Y/BLIN signal), a test video signal output and AD converter analog input. When used as a test video signal output pin, the output pins should be set to the output mode and beforehand the signal control register (SGEN) should be set to “1”. When used as a secondary function input, the input pins should be set to the input mode. When used as an OSD output pin, the output pins should be set to the output mode and beforehand the port P6 data selection register (P67S to P64S) should be clear to “0”. When used as port P6, the signal control register (P67 to P64) should be set to “1”. Note: Input mode port is read the state of input pin. When input/output mode is used mixed, the contents of output latch setting input mode may be changed by executing bit manipulation instructions. Example: Sets the lower 4 bits (P63 to P60) in port P6 to the output mode, and the other bit to the input mode. LD (P6CR), 0FH ; P6CR ← 00001111B |
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