TMP88CS38BFG datasheet(87/218 Pages) TOSHIBA

87 / 218 page

TMP88CS38B/CM38B/CP38B

2007-09-12

88CS38B-87

2.9.2

Control

The following registers are used for control the serial bus interface and monitor the

operation status.

•

Serial bus interface control register A (SBICRA)

•

Serial bus interface control register B (SBICRB)

•

Serial bus interface data buffer register (SBIDBR)

•

I2C bus address register (I2CAR)

•

Serial bus interface status register A (SBISRA)

•

Serial bus interface status register B (SBISRB)

•

Serial clock source control register (SCCRB)

•

Serial clock control status register (SCSR)

The above registers differ depending on a mode to be used. Refer to section 2.9.7 “I2C Bus

Mode Control” and 2.9.9 “Clocked-synchronous 8-Bit SIO Mode Control”.

2.9.3

Serial Clock Source Control

A serial bus interface circuit can reduce the power consumption by stopping a serial clock

generater.

Serial Clock Source Control Register

SCCRB

(00FF1H)

SCEN

(Initial value: 0*** ****)

SCEN

Serial clock source control

0: Do not generate source clock

1: Generate source clock

Write

only

Note:

When SCRQ and SCEN are “1”, SCEN cannot be cleared to “0”. When SCRQ is “0”, SCEN is cleared to “0”.

Serial Clock Control Status Register

SCSR

(00FF1H)

SCRQ

(Initial value: 0*** ****)

SCRQ

Serial clock source request

0: No source clock request from serial bus interface

1: Source clock request from serial bus interface

Read

only

Figure 2.9.2 Serial Clock Source

Clock generation

“1”

→ SCEN Write data except

“00” to SBIM

Write data

“00” to SBIM

“0”

→ SCEN

Source clock

SCEN

SCRQ

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