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TMP88CS38BFG Datasheet(PDF) 71 Page - Toshiba Semiconductor

Part # TMP88CS38BFG
Description  CMOS 8-Bit Microcontroller
PDF  218 Pages
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Manufacturer  TOSHIBA [Toshiba Semiconductor]
Direct Link  http://www.semicon.toshiba.co.jp/eng
Logo TOSHIBA - Toshiba Semiconductor

TMP88CS38BFG Datasheet(HTML) 71 Page - Toshiba Semiconductor

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TMP88CS38B/CM38B/CP38B
2007-09-12
88CS38B-71
2.6.3
Function
The timer/counter 2 has three operating modes: Timer, event counter and window modes.
(1) Timer mode
In this mode, the internal clock is used for counting up. The contents of TC2DR are
compared with the contents of up counter. If a match is found, a timer/counter 2
interrupt (INTTC2) is generated, and the counter is cleared. Counting up is resumed
after the counter is cleared.
Table 2.6.1 Source Clock (Internal clock) for Timer/Counter 2 (at fc
= 16.0 MHz)
NORMAL, IDLE mode
DV1CK
= 0
DV1CK
= 1
TC2CK
Resolution
Maximum
Time Setting
Resolution
Maximum
Time Setting
000
524.3 [ms]
9.54 [h]
1.05 [s]
19.1
[h]
001
512.0 [
μs]
33.6 [s]
1.02 [ms]
1.12 [min]
010
16.0 [
μs]
1.05 [s]
32.0 [
μs]
2.09 [s]
011
0.5 [
μs]
32.8 [ms]
1.0 [
μs]
65.5
[ms]
100
Reserved
Reserved
Reserved
Reserved
101
Reserved
Reserved
Reserved
Reserved
Example: Sets the source clock fc/2
4 [Hz] and generates an interrupt event 25 ms (at fc
= 16 MHz, DV1CK = 1)
LDW
(TC2DR), 61A8H
;
Sets TC2DR (25 ms
÷ 24/fc = 61A8H)
DI
SET
(EIRH).6
;
Enable INTTC2 interrupt
EI
LD
(TC2CR), 00001100B
;
Selects TC2 source clock
LD
(TC2CR), 00101100B
;
Starts TC2
Figure 2.6.3 Timer Mode Timing Chart
Timer trigger
INTTC2 interrupt
Source clock
Up counter
n
1
2
1
2
3
n
0
Match detect
Counter clear
n
− 1
0
3
4
Count start



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