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STM32G030F6 Datasheet(PDF) 49 Page - STMicroelectronics

Part # STM32G030F6
Description  Arm® Cortex®-M0 32-bit MCU, up to 64 KB Flash, 8 KB RAM, 2x USART, timers, ADC, comm. I/Fs, 2.0-3.6V
PDF  94 Pages
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Manufacturer  STMICROELECTRONICS [STMicroelectronics]
Direct Link  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

STM32G030F6 Datasheet(HTML) 49 Page - STMicroelectronics

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DS12991 Rev 1
49/94
STM32G030x6/x8
Electrical characteristics
80
Table 32. Low-power mode wakeup times(1)
Symbol
Parameter
Conditions
Typ
Max
Unit
tWUSLEEP
Wakeup time from
Sleep to Run
mode
-11
11
CPU
cycles
tWULPSLEEP
Wakeup time from
Low-power sleep
mode
Transiting to Low-power-run-mode execution in Flash
memory not powered in Low-power sleep mode;
HCLK = HSI16 / 8 = 2 MHz
11
14
tWUSTOP0
Wakeup time from
Stop 0
Transiting to Run-mode execution in Flash memory not
powered in Stop 0 mode;
HCLK = HSI16 = 16 MHz;
Regulator in Range 1 or Range 2
5.6
6
µs
Transiting to Run-mode execution in SRAM or in Flash
memory powered in Stop 0 mode;
HCLK = HSI16 = 16 MHz;
Regulator in Range 1 or Range 2
22.4
tWUSTOP1
Wakeup time from
Stop 1
Transiting to Run-mode execution in Flash memory not
powered in Stop 1 mode;
HCLK = HSI16 = 16 MHz;
Regulator in Range 1 or Range 2
9.0
11.2
µs
Transiting to Run-mode execution in SRAM or in Flash
memory powered in Stop 1 mode;
HCLK = HSI16 = 16 MHz;
Regulator in Range 1 or Range 2
57.5
Transiting to Low-power-run-mode execution in Flash
memory not powered in Stop 1 mode;
HCLK = HSI16/8 = 2 MHz;
Regulator in low-power mode (LPR = 1 in PWR_CR1)
22
25.3
Transiting to Low-power-run-mode execution in SRAM or
in Flash memory powered in Stop 1 mode;
HCLK = HSI16 / 8 = 2 MHz;
Regulator in low-power mode (LPR = 1 in PWR_CR1)
18
23.5
tWUSTBY
Wakeup time from
Standby mode
Transiting to Run mode;
HCLK = HSI16 = 16 MHz;
Regulator in Range 1
14.5
30
µs
tWULPRUN
Wakeup time from
Low-power run
mode(2)
Transiting to Run mode;
HSISYS = HSI16/8 = 2 MHz
57
µs
1. Based on characterization results, not tested in production.
2. Time until REGLPF flag is cleared in PWR_SR2.



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