STM32G030F6 datasheet(70/94 Pages) STMICROELECTRONICS

70 / 94 page

Electrical characteristics

STM32G030x6/x8

70/94

DS12991 Rev 1

Figure 20. ADC accuracy characteristics

ENOB

Effective

number of bits

VDDA=VREF+ < 3.6 V;

fADC = 35 MHz; fs ≤ 2.5 MSps;

TA = entire range

9.6

10.2

bit

SINAD

Signal-to-noise

and distortion

ratio

VDDA=VREF+ < 3.6 V;

fADC = 35 MHz; fs ≤ 2.5 MSps;

TA = entire range

59.5

SNR

Signal-to-noise

ratio

VDDA=VREF+ < 3.6 V;

fADC = 35 MHz; fs ≤ 2.5 MSps;

TA = entire range

THD

Total harmonic

distortion

VDDA=VREF+ < 3.6 V;

fADC = 35 MHz; fs ≤ 2.5 MSps;

TA = entire range

--74

-70

1. Based on characterization results, not tested in production.

2. ADC DC accuracy values are measured after internal calibration.

3. Injecting negative current on any analog input pin significantly reduces the accuracy of A-to-D conversion

of signal on another analog input. It is recommended to add a Schottky diode (pin to ground) to analog pins

susceptible to receive negative current.

4. I/O analog switch voltage booster enabled (BOOSTEN = 1 in the SYSCFG_CFGR1) when VDDA < 2.4 V

and disabled when VDDA ≥ 2.4 V.

Table 56. ADC accuracy(1)(2)(3) (continued)

Symbol

Parameter

Conditions(4)

Min

Typ

Max

Unit

MSv19880V3

(1) Example of an actual transfer curve

(2) Ideal transfer curve

(3) End point correlation line

4095

4094

4093

345

4093 4094

4095

1 LSB ideal

(1)

(3)

(2)

Code

(VAIN / VREF+)*4095

ET total unadjusted error: maximum deviation

between the actual and ideal transfer curves.

EG gain error: deviation between the last ideal

transition and the last actual one.

ED differential linearity error: maximum deviation

between actual steps and the ideal ones.

EL integral linearity error: maximum deviation between

any actual transition and the end point correlation line.

EO offset error: maximum deviation between the

first actual transition and the first ideal one.

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