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STM32G030F6 Datasheet(PDF) 14 Page - STMicroelectronics |
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STM32G030F6 Datasheet(HTML) 14 Page - STMicroelectronics |
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14 / 94 page ![]() Functional overview STM32G030x6/x8 14/94 DS12991 Rev 1 3.5 Boot modes At startup, the boot pin and boot selector option bit are used to select one of the three boot options: • boot from User Flash memory • boot from System memory • boot from embedded SRAM The boot pin is shared with a standard GPIO and can be enabled through the boot selector option bit. The boot loader is located in System memory. It manages the Flash memory reprogramming through USART on pins PA9/PA10 or PA2/PA3, or through I2C-bus on pins PB6/PB7 or PB10/PB11. 3.6 Cyclic redundancy check calculation unit (CRC) The CRC (cyclic redundancy check) calculation unit is used to get a CRC code using a configurable generator polynomial value and size. Among other applications, CRC-based techniques are used to verify data transmission or storage integrity. In the scope of the EN/IEC 60335-1 standard, they offer a means of verifying the Flash memory integrity. The CRC calculation unit helps compute a signature of the software during runtime, to be compared with a reference signature generated at link time and stored at a given memory location. 3.7 Power supply management 3.7.1 Power supply schemes The STM32G030x6/x8 devices require a 2.0 V to 3.6 V operating supply voltage (VDD). Several different power supplies are provided to specific peripherals: • VDD = 2.0 to 3.6 V VDD is the external power supply for the internal regulator and the system analog such as reset, power management and internal clocks. It is provided externally through VDD/VDDA pin. • VDDA = 2.0 V to 3.6 V VDDA is the analog power supply for the A/D converter. VDDA voltage level is identical to VDD voltage as it is provided externally through VDD/VDDA pin. • VDDIO1 = VDD VDDIO1 is the power supply for the I/Os. VDDIO1 voltage level is identical to VDD voltage as it is provided externally through VDD/VDDA pin. • VBAT = 1.55 V to 3.6 V VBAT is the power supply (through a power switch) for RTC, TAMP, low-speed external 32.768 kHz oscillator and backup registers when VDD is not present. VBAT is provided externally through VBAT pin. When this pin is not available on the package, VBAT bonding pad is internally bonded to the VDD/VDDA pin. • VREF+ is the input reference voltage for the ADC. When VDDA < 2 V, VREF+ must be equal to VDDA. When VDDA ≥ 2 V, it must be between 2 V and VDDA. It can be grounded when the ADC is not active. |
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