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STM32F103XC Datasheet(PDF) 81 Page - STMicroelectronics |
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STM32F103XC Datasheet(HTML) 81 Page - STMicroelectronics |
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81 / 118 page  STM32F103xC, STM32F103xD, STM32F103xE Electrical characteristics 81/118 Table 39. Switching characteristics for NAND Flash read and write cycles(1) 1. TBD = to be determined. Symbol Parameter Timing Unit Min Max tv(NCEx-A) FSMC_NCEx low (x = 2/3) to FSMC_Ay valid (y = 16/17) - TBD ns th(NCEx-AI) FSMC_NCEx high (x = 2/3) to FSMC_Ax invalid (x = 16/17) TBD - ns td(D-NWE) FSMC_D[15:0] valid before FSMC_NWE high TBD - ns td(NWE-D) FSMC_D[15:0] valid after FSMC_NWE high TBD - ns td(NCEx-NOE) FSMC_NCEx low to FSMC_NOE low - TBD ns tw(NOE) FSMC_NOE low width TBD TBD cycles/ns th(NWE-D) FSMC_NWE high to FSMC_D[15:0] invalid ns td(NOE-NWAITL) FSMC_NWAIT low after FSMC_NOE low (2) 2. When one or more wait states are inserted. If no wait state needs inserted, NWAIT should be kept high or the wait feature should be disabled (WAITEN=0) in the control register. TBD td(NOE-NWAITH) FSMC_NWAIT high after FSMC_NOE low (2) TBD td(NWAIT-NOE) FSMC_NOE high after FSMC_NWAIT high TBD - ns tsu(D-NOE) FSMC_D[15:0] valid data before FSMC_NOE high TBD - ns th(NOE-D) FSMC_D[15:0] valid data after FSMC_NOE high TBD - ns td(NCEx-NWE) FSMC_NCEx low to FSMC_NWE low - TBD ns tw(NWE) FSMC_NWE low width TBD TBD cycles/ns td(NWE-NCEx) FSMC_NWE high to FSMC_NCEx high TBD ns td(NWE-NWAITL) FSMC_NWAIT low after FSMC_NWE low (2) TBD ns td(NWE-NWAITH) FSMC_NWAIT high after FSMC_NWE low (2) TBD ns td(NWAIT-NWE) FSMC_NWE high after FSMC_NWAIT high TBD - ns tv(NWE-D) FSMC_NWE low to FSMC_D[15:0] valid - TBD ns th(NWE-D) FSMC_NWE high to FSMC_D[15:0] invalid TBD - ns |
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