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STM32F103XC Datasheet(PDF) 95 Page - STMicroelectronics |
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STM32F103XC Datasheet(HTML) 95 Page - STMicroelectronics |
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95 / 118 page ![]() STM32F103xC, STM32F103xD, STM32F103xE Electrical characteristics 95/118 Figure 46. I2S slave timing diagram(1) 1. Measurement points are done at CMOS levels: 0.3 × VDD and 0.7 × VDD. Figure 47. I2S master timing diagram(1) 1. Data based on design simulation and/or characterization results, not tested in production. CPOL = 0 CPOL = 1 tc(CK) WS input SDtransmit SDreceive tw(CKH) tw(CKL) tsu(WS) tv(SD_ST) th(SD_ST) th(WS) tsu(SD_SR) th(SD_SR) MSB receive Bit1 receive LSB receive MSB transmit Bitn transmit LSB transmit ai14881 CPOL = 0 CPOL = 1 tc(CK) WS output SDreceive SDtransmit tw(CKH) tw(CKL) tsu(SD_MR) tv(SD_MT) th(SD_MT) th(WS) th(SD_MR) MSB transmit Bitn transmit LSB transmit MSB receive Bitn receive LSB receive ai14884 tf(CK) tr(CK) tv(WS) |
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