R5F526TFCDFM datasheet(72/142 Pages) RENESAS

72 / 142 page

R01DS0407EJ0120 Rev.1.20

Page 72 of 142

Oct 31, 2024

RX26T Group

2. Electrical Characteristics

2.4.1

Reset Timing

Figure 2.2

Reset Input Timing at Power-On

Figure 2.3

Reset Input Timing

Table 2.15

Reset Timing

Conditions: VCC = 2.7 to 5.5 V, AVCC0 = AVCC1 = AVCC2 = 3.0 to 5.5 V,

VSS = AVSS0 = AVSS1 = AVSS2 = 0 V,

Ta = Topr

Item

Symbol

Min.

Typ.

Max.

Unit

Test

Conditions

RES# pulse

width

Power-on

tRESWP

2.0

—

Figure 2.2

Software standby mode

tRESWS

0.3

—

Figure 2.3

Programming or erasure of the code flash

memory, or programming, erasure or blank

checking of the data flash memory

tRESWF

200

—

µs

Other than above

tRESW

200

—

Waiting time after release from the RES# pin reset

tRESWT

—

tLcyc

Figure 2.2

Internal reset time

(independent watchdog timer reset, watchdog timer reset,

software reset)

tRESW2

116

—

124

tLcyc

VCC

RES#

Internal reset signal

(Low is valid)

tRESWP

tRESWT

RES#

Internal reset signal

(Low is valid)

tRESWS, tRESWF, tRESW

tRESWT

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